From 0467811e9bdb22c7a1595db4c230efd99265e3c7 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 14 Feb 2014 09:21:30 +0000 Subject: [PATCH] MIPS: mark GIC clockevent device with CLOCK_EVT_FEAT_C3STOP Although the GIC counter will continue when a core is in a low power state and it will still trigger interrupts, the core will be incapable of servicing those interrupts rendering them useless. Signed-off-by: Paul Burton --- arch/mips/kernel/cevt-gic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/cevt-gic.c b/arch/mips/kernel/cevt-gic.c index 594cbbf16d62..925bae559067 100644 --- a/arch/mips/kernel/cevt-gic.c +++ b/arch/mips/kernel/cevt-gic.c @@ -73,7 +73,8 @@ int gic_clockevent_init(void) cd = &per_cpu(gic_clockevent_device, cpu); cd->name = "MIPS GIC"; - cd->features = CLOCK_EVT_FEAT_ONESHOT; + cd->features = CLOCK_EVT_FEAT_ONESHOT | + CLOCK_EVT_FEAT_C3STOP; clockevent_set_clock(cd, gic_frequency); -- 2.39.5