From 04b8637be92f284409651088f3856f4290a931d8 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Tue, 4 Aug 2015 18:52:09 +0100 Subject: [PATCH] arm64: alternatives: ensure secondary CPUs execute ISB after patching In order to guarantee that the patched instruction stream is visible to a CPU, that CPU must execute an isb instruction after any related cache maintenance has completed. The instruction patching routines in kernel/insn.c get this right for things like jump labels and ftrace, but the alternatives patching omits it entirely leaving secondary cores in a potential limbo between the old and the new code. This patch adds an isb following the secondary polling loop in the altenatives patching. Signed-off-by: Will Deacon --- arch/arm64/kernel/alternative.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c index fa1d575ab2c2..ab9db0e9818c 100644 --- a/arch/arm64/kernel/alternative.c +++ b/arch/arm64/kernel/alternative.c @@ -132,6 +132,7 @@ static int __apply_alternatives_multi_stop(void *unused) if (smp_processor_id()) { while (!READ_ONCE(patched)) cpu_relax(); + isb(); } else { BUG_ON(patched); __apply_alternatives(®ion); -- 2.39.2