From 05c348377d90483f63362af3dc980d30fdc777be Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 18 Nov 2016 21:17:47 +0000 Subject: [PATCH] drm/i915: Skip final clflush if LLC is coherent MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit If the LLC is coherent with the object, we do not need to worry about whether main memory and cache mismatch when we hand the object back to the system. Signed-off-by: Chris Wilson Reviewed-by: Ville Syrjälä Link: http://patchwork.freedesktop.org/patch/msgid/20161118211747.25197-2-chris@chris-wilson.co.uk --- drivers/gpu/drm/i915/i915_gem.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index b6ad1bae5a15..902fa427c196 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -229,7 +229,8 @@ __i915_gem_object_release_shmem(struct drm_i915_gem_object *obj, if (obj->mm.madv == I915_MADV_DONTNEED) obj->mm.dirty = false; - if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0) + if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0 && + !cpu_cache_is_coherent(obj->base.dev, obj->cache_level)) drm_clflush_sg(pages); obj->base.read_domains = I915_GEM_DOMAIN_CPU; -- 2.39.5