From 0aa785d6443d25baf9d55a5a8f748874c5915b0f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 20 Jul 2015 05:48:37 +0200 Subject: [PATCH] arm: socfpga: config: Enable CONFIG_SPI_FLASH_BAR This is needed to access broken (read: Micron) SPI flashes which are larger than 16 MiB and don't correctly support 4-byte addressing. Signed-off-by: Marek Vasut --- include/configs/socfpga_common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 24f2ec01b1..9ee4a75eb1 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -207,6 +207,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #define CONFIG_CQSPI_DECODER 0 #define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_BAR #endif #ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */ -- 2.39.2