From 1bebfa351bf41549a9f61c22ef869d47512bd0f4 Mon Sep 17 00:00:00 2001 From: Vasily Khoruzhick Date: Sat, 13 Aug 2011 13:58:19 +0100 Subject: [PATCH] fixup! ARM: LPAE: MMU setup for the 3-level page table format Fix non-LPAE boot regression. It was introduced by 407f8b4cb07cbc5c1c7cc386f231224e2524ccea ARM: LPAE: MMU setup for the 3-level page table format Signed-off-by: Vasily Khoruzhick Signed-off-by: Catalin Marinas --- arch/arm/kernel/head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 0bdafc4351bf..1b6aa00131a6 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -206,7 +206,7 @@ __create_page_tables: 1: orr r3, r7, r5, lsl #SECTION_SHIFT @ flags + kernel base str r3, [r4, r5, lsl #PMD_ORDER] @ identity mapping cmp r5, r6 - addlo r5, r5, #SECTION_SHIFT >> 20 @ next section + addlo r5, r5, #1 @ next section blo 1b /* -- 2.39.5