From 1eb9108c7d8ee8934be460f9350154ea21b1b6f9 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 7 Dec 2013 12:26:35 +0400 Subject: [PATCH] ARM: dts: imx27-phytec-phycore-som: Add pinctrl for CSPI1 and GPIOs used on module Signed-off-by: Alexander Shiyan Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx27-phytec-phycore-som.dts | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts index ce8d69ad4313..7087a4f920ef 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts +++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts @@ -51,6 +51,8 @@ }; &cspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cspi1>; fsl,spi-num-chipselects = <1>; cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; status = "okay"; @@ -181,8 +183,19 @@ &iomuxc { imx27_phycore_som { + pinctrl_cspi1: cspi1grp { + fsl,pins = < + MX27_CSPI1_PINGRP1 + MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* SPI1 CS0 */ + MX27_PAD_USB_PWR__GPIO2_23 0x0 /* PMIC IRQ */ + >; + }; + pinctrl_fec1: fec1grp { - fsl,pins = ; + fsl,pins = < + MX27_FEC1_PINGRP1 + MX27_PAD_SSI3_TXDAT__GPIO3_30 0x0 /* FEC RST */ + >; }; pinctrl_i2c2: i2c2grp { -- 2.39.5