From 375e12abceac4e8e20ea54ff6a9e7be58729ac70 Mon Sep 17 00:00:00 2001 From: Juha Yrjola Date: Wed, 6 Dec 2006 17:13:50 -0800 Subject: [PATCH] ARM: OMAP: Optimize INTC register accesses and enable autoidling Use virtual addresses directly instead of physical addresses to avoid having to recalculate the virtual address with every register access. Signed-off-by: Juha Yrjola Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index a39d30680300..f064f725e724 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -37,7 +37,7 @@ static struct omap_irq_bank { } __attribute__ ((aligned(4))) irq_banks[] = { { /* MPU INTC */ - .base_reg = OMAP24XX_IC_BASE, + .base_reg = IO_ADDRESS(OMAP24XX_IC_BASE), .nr_irqs = 96, }, { /* XXX: DSP INTC */ @@ -47,7 +47,7 @@ static struct omap_irq_bank { /* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq(unsigned int irq) { - omap_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL); + __raw_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL); } static void omap_mask_irq(unsigned int irq) @@ -60,7 +60,7 @@ static void omap_mask_irq(unsigned int irq) irq %= 32; } - omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset); + __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset); } static void omap_unmask_irq(unsigned int irq) @@ -73,7 +73,7 @@ static void omap_unmask_irq(unsigned int irq) irq %= 32; } - omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset); + __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset); } static void omap_mask_ack_irq(unsigned int irq) @@ -93,17 +93,20 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) { unsigned long tmp; - tmp = omap_readl(bank->base_reg + INTC_REVISION) & 0xff; + tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff; printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " "(revision %ld.%ld) with %d interrupts\n", bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); - tmp = omap_readl(bank->base_reg + INTC_SYSCONFIG); + tmp = __raw_readl(bank->base_reg + INTC_SYSCONFIG); tmp |= 1 << 1; /* soft reset */ - omap_writel(tmp, bank->base_reg + INTC_SYSCONFIG); + __raw_writel(tmp, bank->base_reg + INTC_SYSCONFIG); - while (!(omap_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1)) + while (!(__raw_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1)) /* Wait for reset to complete */; + + /* Enable autoidle */ + __raw_writel(1 << 0, bank->base_reg + INTC_SYSCONFIG); } void __init omap_init_irq(void) -- 2.39.5