From 3a085e3e702672bc2867ae8e7bc552dc7af287fd Mon Sep 17 00:00:00 2001 From: =?utf8?q?Lothar=20Wa=C3=9Fmann?= Date: Thu, 17 Aug 2017 12:37:11 +0200 Subject: [PATCH] arm: remove bogus cp_delay() function Due to a missing 'volatile' in the get_cr() function, the asm instruction may be optimized away by the compiler. This bug has been papered over with a delay loop after reading the CP15 control register. Fix the asm statement and remove the bogus workaround. --- arch/arm/include/asm/system.h | 2 +- arch/arm/lib/cache-cp15.c | 13 ------------- 2 files changed, 1 insertion(+), 14 deletions(-) diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 2b28a261ba..ad524c5ef0 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -64,7 +64,7 @@ static inline unsigned int get_cr(void) { unsigned int val; - asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); + asm volatile("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); return val; } diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index e6c3eae6f9..09767b6b99 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -40,16 +40,6 @@ void __arm_init_before_mmu(void) void arm_init_before_mmu(void) __attribute__((weak, alias("__arm_init_before_mmu"))); -static void cp_delay (void) -{ - volatile int i; - - /* copro seems to need some delay between reading and writing */ - for (i = 0; i < 100; i++) - nop(); - asm volatile("" : : : "memory"); -} - static inline void dram_bank_mmu_setup(int bank) { u32 *page_table = (u32 *)gd->tlb_addr; @@ -88,7 +78,6 @@ static inline void mmu_setup(void) : : "r" (~0)); /* and enable the mmu */ reg = get_cr(); /* get control reg. */ - cp_delay(); set_cr(reg | CR_M); } @@ -106,7 +95,6 @@ static void cache_enable(uint32_t cache_bit) if ((cache_bit == CR_C) && !mmu_enabled()) mmu_setup(); reg = get_cr(); /* get control reg. */ - cp_delay(); set_cr(reg | cache_bit); } @@ -125,7 +113,6 @@ static void cache_disable(uint32_t cache_bit) flush_dcache_all(); } reg = get_cr(); - cp_delay(); set_cr(reg & ~cache_bit); } #endif -- 2.39.2