From 3e1f99cd0c4af47c64a3c79005f1ee70a02f4182 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sat, 10 Sep 2011 12:29:43 +0200 Subject: [PATCH] arm: mx28: check for gated clocks when setting saif divider MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Like with all other clocks, the divider for the SAIF devices should not be altered when the clock is gated. Bail out when this is the case like the other clocks do. Signed-off-by: Wolfram Sang Signed-off-by: Uwe Kleine-König --- arch/arm/mach-mxs/clock-mx28.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c index b3a71245f385..f81ec1f59ab9 100644 --- a/arch/arm/mach-mxs/clock-mx28.c +++ b/arch/arm/mach-mxs/clock-mx28.c @@ -448,6 +448,10 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs); \ reg &= ~BM_CLKCTRL_##rs##_DIV; \ reg |= div << BP_CLKCTRL_##rs##_DIV; \ + if (reg & (1 << clk->enable_shift)) { \ + pr_err("%s: clock is gated\n", __func__); \ + return -EINVAL; \ + } \ __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs); \ \ for (i = 10000; i; i--) \ -- 2.39.5