From 42a708c9328b1b23ed5f415401975e37a64f2747 Mon Sep 17 00:00:00 2001 From: Qipan Li Date: Thu, 4 Jul 2013 15:55:25 +0800 Subject: [PATCH] pinctrl: sirf: fix the pin number and mux bit for usp0 we missed a pin and related mux bit for usp pin group, this patch fixes it. Signed-off-by: Qipan Li Signed-off-by: Barry Song Signed-off-by: Linus Walleij --- drivers/pinctrl/sirf/pinctrl-atlas6.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/sirf/pinctrl-atlas6.c b/drivers/pinctrl/sirf/pinctrl-atlas6.c index 1fa39a444171..c641be9c5b80 100644 --- a/drivers/pinctrl/sirf/pinctrl-atlas6.c +++ b/drivers/pinctrl/sirf/pinctrl-atlas6.c @@ -496,7 +496,7 @@ static const unsigned sdmmc5_pins[] = { 24, 25, 26 }; static const struct sirfsoc_muxmask usp0_muxmask[] = { { .group = 1, - .mask = BIT(19) | BIT(20) | BIT(21) | BIT(22), + .mask = BIT(19) | BIT(20) | BIT(21) | BIT(22) | BIT(23), }, }; @@ -507,7 +507,7 @@ static const struct sirfsoc_padmux usp0_padmux = { .funcval = 0, }; -static const unsigned usp0_pins[] = { 51, 52, 53, 54 }; +static const unsigned usp0_pins[] = { 51, 52, 53, 54, 55 }; static const struct sirfsoc_muxmask usp1_muxmask[] = { { -- 2.39.5