From 472c95a6e352413af068b42ab0db2b2e23c20756 Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Wed, 18 Mar 2015 02:14:07 +0900 Subject: [PATCH] dt-bindings: add asynchronous bridge clock for exynos The patch adds bindings for clocks required by async-bridges present in the particular power domain. Signed-off-by: Andrzej Hajda Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index f4445e5a2bbb..c47e79be4605 100644 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt @@ -22,6 +22,9 @@ Optional Properties: - pclkN, clkN: Pairs of parent of input clock and input clock to the devices in this power domain. Maximum of 4 pairs (N = 0 to 3) are supported currently. + - asbN: Clocks required by asynchronous bridges (ASB) present in + the power domain. These clock should be enabled during power + domain on/off operations. Node of a device using power domains must have a power-domains property defined with a phandle to respective power domain. -- 2.39.2