From 49e497ef43e06dbf65e0a3637bcaedb31ce17d34 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Tue, 24 Sep 2013 21:26:31 +0300 Subject: [PATCH] drm/i915: Don't lie about findind suitable PLL settings on VLV MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit If vlv_find_best_dpll() couldn't find suitable PLL settings, just say so instead of lying to caller. Signed-off-by: Ville Syrjälä Reviewed-by: Mika Kuoppala Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1ea6d49b9380..0e87970a03f6 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -662,6 +662,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, unsigned int bestppm = 1000000; /* min update 19.2 MHz */ int max_n = min(limit->n.max, refclk / 19200); + bool found = false; target *= 5; /* fast clock */ @@ -692,18 +693,20 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, if (ppm < 100 && clock.p > best_clock->p) { bestppm = 0; *best_clock = clock; + found = true; } if (bestppm >= 10 && ppm < bestppm - 10) { bestppm = ppm; *best_clock = clock; + found = true; } } } } } - return true; + return found; } bool intel_crtc_active(struct drm_crtc *crtc) -- 2.39.5