From 4a7624f664a239a11dfa71ccd9e741df29047508 Mon Sep 17 00:00:00 2001 From: Deepak S Date: Sat, 9 May 2015 18:11:54 +0530 Subject: [PATCH] drm/i915/chv: Extend set idle rps wa to chv MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit It is observed on BSW that requesting a new frequency from Punit does nothing when the GPU is in rc6, and if we let GPU enter rc6 with a high frequency, Vnn remains slightly higher than at minimum frequency. Extending vlv_set_rps_idle() workaround on CHV/BSW. v2: Update commit msg (Ville) suggested-by: Ville Syrjälä Signed-off-by: Deepak S Reviewed-by: Ville Syrjälä Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_pm.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d22bba98d83f..2b016f2e3465 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4106,15 +4106,8 @@ static void valleyview_set_rps(struct drm_device *dev, u8 val) */ static void vlv_set_rps_idle(struct drm_i915_private *dev_priv) { - struct drm_device *dev = dev_priv->dev; u32 val = dev_priv->rps.idle_freq; - /* CHV don't need to force the gfx clock */ - if (IS_CHERRYVIEW(dev)) { - valleyview_set_rps(dev_priv->dev, val); - return; - } - if (dev_priv->rps.cur_freq <= val) return; -- 2.39.5