From 4c060b89c1af20b3a9d6393072ac85b4a3ccc300 Mon Sep 17 00:00:00 2001 From: Alan Tull Date: Tue, 2 Jun 2015 18:35:39 +0000 Subject: [PATCH] ARM: socfpga: dts: add sdram controller dt binding doc Add binding doc for Altera SOCFPGA SDRAM controller. Signed-off-by: Alan Tull Signed-off-by: Dinh Nguyen --- .../bindings/arm/altera/socfpga-sdram-controller.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt new file mode 100644 index 000000000000..77ca635765e1 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-controller.txt @@ -0,0 +1,12 @@ +Altera SOCFPGA SDRAM Controller + +Required properties: +- compatible : Should contain "altr,sdr-ctl" and "syscon". + syscon is required by the Altera SOCFPGA SDRAM EDAC. +- reg : Should contain 1 register range (address and length) + +Example: + sdr: sdr@ffc25000 { + compatible = "altr,sdr-ctl", "syscon"; + reg = <0xffc25000 0x1000>; + }; -- 2.39.5