From 4e5ce0a8f3a2e59e17b997601947f6863ce69256 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Fri, 1 May 2015 14:59:07 -0700 Subject: [PATCH] staging: comedi: ni_stc.h: tidy up AO_Mode_1_Register and bits Rename the CamelCase. Use the BIT() macro to define the bits. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- .../staging/comedi/drivers/ni_mio_common.c | 35 ++++++++++--------- drivers/staging/comedi/drivers/ni_stc.h | 22 ++++++------ 2 files changed, 30 insertions(+), 27 deletions(-) diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c index a2049a3d3341..e4ae9a1445b5 100644 --- a/drivers/staging/comedi/drivers/ni_mio_common.c +++ b/drivers/staging/comedi/drivers/ni_mio_common.c @@ -344,7 +344,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = { [NISTC_G1_LOADB_REG] = { 0x144, 4 }, [NISTC_G0_INPUT_SEL_REG] = { 0x148, 2 }, [NISTC_G1_INPUT_SEL_REG] = { 0x14a, 2 }, - [AO_Mode_1_Register] = { 0x14c, 2 }, + [NISTC_AO_MODE1_REG] = { 0x14c, 2 }, [AO_Mode_2_Register] = { 0x14e, 2 }, [AO_UI_Load_A_Register] = { 0x150, 4 }, [AO_UI_Load_B_Register] = { 0x154, 4 }, @@ -2957,13 +2957,13 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) ni_ao_config_chanlist(dev, s, cmd->chanlist, cmd->chanlist_len, 1); if (cmd->stop_src == TRIG_NONE) { - devpriv->ao_mode1 |= AO_Continuous; - devpriv->ao_mode1 &= ~AO_Trigger_Once; + devpriv->ao_mode1 |= NISTC_AO_MODE1_CONTINUOUS; + devpriv->ao_mode1 &= ~NISTC_AO_MODE1_TRIGGER_ONCE; } else { - devpriv->ao_mode1 &= ~AO_Continuous; - devpriv->ao_mode1 |= AO_Trigger_Once; + devpriv->ao_mode1 &= ~NISTC_AO_MODE1_CONTINUOUS; + devpriv->ao_mode1 |= NISTC_AO_MODE1_TRIGGER_ONCE; } - ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register); + ni_stc_writew(dev, devpriv->ao_mode1, NISTC_AO_MODE1_REG); switch (cmd->start_src) { case TRIG_INT: case TRIG_NOW: @@ -2990,7 +2990,7 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ao_mode3 &= ~AO_Trigger_Length; ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register); - ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register); + ni_stc_writew(dev, devpriv->ao_mode1, NISTC_AO_MODE1_REG); devpriv->ao_mode2 &= ~AO_BC_Initial_Load_Source; ni_stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register); if (cmd->stop_src == TRIG_NONE) @@ -3028,9 +3028,10 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) ni_stc_writel(dev, cmd->stop_arg, AO_UC_Load_A_Register); } - devpriv->ao_mode1 &= - ~(AO_UI_Source_Select(0x1f) | AO_UI_Source_Polarity | - AO_UPDATE_Source_Select(0x1f) | AO_UPDATE_Source_Polarity); + devpriv->ao_mode1 &= ~(NISTC_AO_MODE1_UPDATE_SRC_MASK | + NISTC_AO_MODE1_UI_SRC_MASK | + NISTC_AO_MODE1_UPDATE_SRC_POLARITY | + NISTC_AO_MODE1_UI_SRC_POLARITY); switch (cmd->scan_begin_src) { case TRIG_TIMER: devpriv->ao_cmd2 &= ~NISTC_AO_CMD2_BC_GATE_ENA; @@ -3043,9 +3044,9 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) break; case TRIG_EXT: devpriv->ao_mode1 |= - AO_UPDATE_Source_Select(cmd->scan_begin_arg); + NISTC_AO_MODE1_UPDATE_SRC(cmd->scan_begin_arg); if (cmd->scan_begin_arg & CR_INVERT) - devpriv->ao_mode1 |= AO_UPDATE_Source_Polarity; + devpriv->ao_mode1 |= NISTC_AO_MODE1_UPDATE_SRC_POLARITY; devpriv->ao_cmd2 |= NISTC_AO_CMD2_BC_GATE_ENA; break; default: @@ -3053,13 +3054,13 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) break; } ni_stc_writew(dev, devpriv->ao_cmd2, NISTC_AO_CMD2_REG); - ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register); + ni_stc_writew(dev, devpriv->ao_mode1, NISTC_AO_MODE1_REG); devpriv->ao_mode2 &= ~(AO_UI_Reload_Mode(3) | AO_UI_Initial_Load_Source); ni_stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register); if (cmd->scan_end_arg > 1) { - devpriv->ao_mode1 |= AO_Multiple_Channels; + devpriv->ao_mode1 |= NISTC_AO_MODE1_MULTI_CHAN; ni_stc_writew(dev, AO_Number_Of_Channels(cmd->scan_end_arg - 1) | AO_UPDATE_Output_Select(AO_Update_Output_High_Z), @@ -3067,7 +3068,7 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) } else { unsigned bits; - devpriv->ao_mode1 &= ~AO_Multiple_Channels; + devpriv->ao_mode1 &= ~NISTC_AO_MODE1_MULTI_CHAN; bits = AO_UPDATE_Output_Select(AO_Update_Output_High_Z); if (devpriv->is_m_series || devpriv->is_6xxx) { bits |= AO_Number_Of_Channels(0); @@ -3077,7 +3078,7 @@ static int ni_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) } ni_stc_writew(dev, bits, AO_Output_Control_Register); } - ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register); + ni_stc_writew(dev, devpriv->ao_mode1, NISTC_AO_MODE1_REG); ni_stc_writew(dev, NISTC_AO_CMD1_DAC1_UPDATE_MODE | NISTC_AO_CMD1_DAC0_UPDATE_MODE, @@ -3228,7 +3229,7 @@ static int ni_ao_reset(struct comedi_device *dev, struct comedi_subdevice *s) devpriv->ao_cmd2 = 0; ni_stc_writew(dev, devpriv->ao_cmd2, NISTC_AO_CMD2_REG); devpriv->ao_mode1 = 0; - ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register); + ni_stc_writew(dev, devpriv->ao_mode1, NISTC_AO_MODE1_REG); devpriv->ao_mode2 = 0; ni_stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register); if (devpriv->is_m_series) diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h index 37905858e768..9919e7d2f5e5 100644 --- a/drivers/staging/comedi/drivers/ni_stc.h +++ b/drivers/staging/comedi/drivers/ni_stc.h @@ -220,6 +220,18 @@ #define NISTC_G0_INPUT_SEL_REG 36 #define NISTC_G1_INPUT_SEL_REG 37 +#define NISTC_AO_MODE1_REG 38 +#define NISTC_AO_MODE1_UPDATE_SRC(x) (((x) & 0x1f) << 11) +#define NISTC_AO_MODE1_UPDATE_SRC_MASK NISTC_AO_MODE1_UPDATE_SRC(0x1f) +#define NISTC_AO_MODE1_UI_SRC(x) (((x) & 0x1f) << 6) +#define NISTC_AO_MODE1_UI_SRC_MASK NISTC_AO_MODE1_UI_SRC(0x1f) +#define NISTC_AO_MODE1_MULTI_CHAN BIT(5) +#define NISTC_AO_MODE1_UPDATE_SRC_POLARITY BIT(4) +#define NISTC_AO_MODE1_UI_SRC_POLARITY BIT(3) +#define NISTC_AO_MODE1_UC_SW_EVERY_TC BIT(2) +#define NISTC_AO_MODE1_CONTINUOUS BIT(1) +#define NISTC_AO_MODE1_TRIGGER_ONCE BIT(0) + #define AI_Status_1_Register 2 #define Interrupt_A_St 0x8000 #define AI_FIFO_Full_St 0x4000 @@ -274,16 +286,6 @@ enum Joint_Status_2_Bits { AO_TMRDACWRs_In_Progress_St = 0x20, }; -#define AO_Mode_1_Register 38 -#define AO_UPDATE_Source_Select(x) (((x)&0x1f)<<11) -#define AO_UI_Source_Select(x) (((x)&0x1f)<<6) -#define AO_Multiple_Channels _bit5 -#define AO_UPDATE_Source_Polarity _bit4 -#define AO_UI_Source_Polarity _bit3 -#define AO_UC_Switch_Load_Every_TC _bit2 -#define AO_Continuous _bit1 -#define AO_Trigger_Once _bit0 - #define AO_Mode_2_Register 39 #define AO_FIFO_Mode_Mask (0x3 << 14) enum AO_FIFO_Mode_Bits { -- 2.39.2