From 58ddfbb1a940535926b09d7a4fea6f6db2fd15bf Mon Sep 17 00:00:00 2001 From: Sandor Yu Date: Thu, 14 Nov 2013 16:48:42 +0800 Subject: [PATCH] ENGR00288021 IPUv3 disp:get the integer part of div correctly TV will show 639x480p60 when HDMI output 640x480p60. The same issue can be found when pixel clock sources from ipu internally. All video modes whose pixel clocks derive from DI clock work OK. It is caused by the wrong parent clock rate the driver gets. Fix the issue by getting the right parent clock(ipu->pixel_clk_sel). Signed-off-by: Sandor Yu --- drivers/mxc/ipu3/ipu_disp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mxc/ipu3/ipu_disp.c b/drivers/mxc/ipu3/ipu_disp.c index 09babc6b6ded..8315bffb32cd 100644 --- a/drivers/mxc/ipu3/ipu_disp.c +++ b/drivers/mxc/ipu3/ipu_disp.c @@ -1138,7 +1138,7 @@ int32_t ipu_init_sync_panel(struct ipu_soc *ipu, int disp, uint32_t pixel_clk, } msleep(5); /* Get integer portion of divider */ - div = clk_get_rate(clk_get_parent(ipu->pixel_clk[disp])) / rounded_pixel_clk; + div = clk_get_rate(clk_get_parent(ipu->pixel_clk_sel[disp])) / rounded_pixel_clk; dev_dbg(ipu->dev, "div:%d\n", div); if (!div) { dev_err(ipu->dev, "invalid pixel clk div = 0\n"); -- 2.39.5