From 5a70cc044e74e72550c806a1b0fc82fc11130dc3 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 15 Aug 2011 13:20:34 +0100 Subject: [PATCH] fixup! ARM: LPAE: MMU setup for the 3-level page table format Fix non-LPAE hardware breakage when KERNEL_START is not 2MB aligned. Signed-off-by: Catalin Marinas Reported-by: Vasily Khoruzhick --- arch/arm/kernel/head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 1b6aa00131a6..a400a4dc57cf 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -217,7 +217,7 @@ __create_page_tables: mov r3, r3, lsr #SECTION_SHIFT orr r3, r7, r3, lsl #SECTION_SHIFT add r0, r4, #(KERNEL_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) - str r3, [r0, #(KERNEL_START & 0x00e00000) >> (SECTION_SHIFT - PMD_ORDER)]! + str r3, [r0, #((KERNEL_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]! ldr r6, =(KERNEL_END - 1) add r0, r0, #1 << PMD_ORDER add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) -- 2.39.5