From 5c556ff4990a4de4dc563459d5f271f59884af66 Mon Sep 17 00:00:00 2001 From: Luwei Zhou Date: Thu, 15 Aug 2013 14:35:32 +0800 Subject: [PATCH] ENGR00275394 i.MX6:IEEE1588: disable phy Ar8031 SmartEEE Connecting two boards directly more than 2 hours, Ar8031 phy link status generates glitch, which cause ethernet link down/up issue, but ethernet still be active. There have three cases to validate the issue: Item#1: If add performance stress test while runing IEEE1588, the link down/up issue cannot be found. Item#2: If insert switch between two net nodes and run IEEE1588 test, the issue also cannot be found. Item#3: If disable AR8031 SmartEEE feature, after two days overnight test, no such issue found. The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can prevent phy enter lpm mode, which match the Item#3 test result, so disable SmartEEE feature to avoid the link issue generation. Signed-off-by: Luwei Zhou --- arch/arm/mach-imx/mach-imx6q.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 47af9aeedfe5..d551829379cb 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -135,6 +135,14 @@ static int ar8031_phy_fixup(struct phy_device *dev) { u16 val; + /* disable phy AR8031 SmartEEE function. */ + phy_write(dev, 0xd, 0x3); + phy_write(dev, 0xe, 0x805d); + phy_write(dev, 0xd, 0x4003); + val = phy_read(dev, 0xe); + val &= ~(0x1 << 8); + phy_write(dev, 0xe, val); + /* To enable AR8031 output a 125MHz clk from CLK_25M */ phy_write(dev, 0xd, 0x7); phy_write(dev, 0xe, 0x8016); -- 2.39.5