From 5eb0c5581b483972e070dbfa85d852796844a990 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Lothar=20Wa=C3=9Fmann?= Date: Mon, 1 Jul 2013 10:22:09 +0200 Subject: [PATCH 1/1] ASoC: davinci: set bit delay depending on I2S format --- sound/soc/davinci/davinci-mcasp.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 1ee1b75b0dbe..56a304845d5f 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -500,6 +500,8 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, return -EINVAL; } + dev->codec_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_IB_NF: mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); @@ -709,10 +711,18 @@ static void davinci_hw_param(struct davinci_audio_dev *dev, int stream) if (stream == SNDRV_PCM_STREAM_PLAYBACK) { /* bit stream is MSB first with no delay */ /* DSP_B mode */ + u32 xfmt = TXORD; + + if (dev->codec_fmt == SND_SOC_DAIFMT_I2S) { + /* bit stream is MSB first with 1 bit delay */ + /* I2S mode */ + xfmt |= FSXDLY(1); + } + mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, mask); - mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, TXORD); + mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, xfmt); if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32)) mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, @@ -725,7 +735,14 @@ static void davinci_hw_param(struct davinci_audio_dev *dev, int stream) } else { /* bit stream is MSB first with no delay */ /* DSP_B mode */ - mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, RXORD); + u32 xfmt = RXORD; + + if (dev->codec_fmt == SND_SOC_DAIFMT_I2S) { + /* bit stream is MSB first with 1 bit delay */ + /* I2S mode */ + xfmt |= FSRDLY(1); + } + mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, xfmt); mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); mcasp_set_reg(dev->base + DAVINCI_MCASP_RXTDM_REG, mask); -- 2.39.2