From 5ec3def7355a6f4d08ca612c775cf2320c1012e4 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 14 Apr 2016 14:08:25 +1000 Subject: [PATCH] drm/nouveau/gr/gf100-: rename magic_not_rop_nr to screen_tile_row_offset Signed-off-by: Ben Skeggs --- .../gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c | 6 ++--- .../gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c | 6 ++--- .../gpu/drm/nouveau/nvkm/engine/gr/gf100.c | 24 +++++++++---------- .../gpu/drm/nouveau/nvkm/engine/gr/gf100.h | 2 +- .../gpu/drm/nouveau/nvkm/engine/gr/gk104.c | 4 ++-- .../gpu/drm/nouveau/nvkm/engine/gr/gk20a.c | 2 +- .../gpu/drm/nouveau/nvkm/engine/gr/gm107.c | 4 ++-- .../gpu/drm/nouveau/nvkm/engine/gr/gm200.c | 4 ++-- 8 files changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c index a54b5537677e..b02d8f50ea6a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c @@ -1181,20 +1181,20 @@ gf100_grctx_generate_r418bb8(struct gf100_gr *gr) /* GPC_BROADCAST */ nvkm_wr32(device, 0x418bb8, (gr->tpc_total << 8) | - gr->magic_not_rop_nr); + gr->screen_tile_row_offset); for (i = 0; i < 6; i++) nvkm_wr32(device, 0x418b08 + (i * 4), data[i]); /* GPC_BROADCAST.TP_BROADCAST */ nvkm_wr32(device, 0x419bd0, (gr->tpc_total << 8) | - gr->magic_not_rop_nr | data2[0]); + gr->screen_tile_row_offset | data2[0]); nvkm_wr32(device, 0x419be4, data2[1]); for (i = 0; i < 6; i++) nvkm_wr32(device, 0x419b00 + (i * 4), data[i]); /* UNK78xx */ nvkm_wr32(device, 0x4078bc, (gr->tpc_total << 8) | - gr->magic_not_rop_nr); + gr->screen_tile_row_offset); for (i = 0; i < 6; i++) nvkm_wr32(device, 0x40780c + (i * 4), data[i]); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c index 2be27179a261..0c99f3c3a376 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c @@ -924,20 +924,20 @@ gk104_grctx_generate_r418bb8(struct gf100_gr *gr) /* GPC_BROADCAST */ nvkm_wr32(device, 0x418bb8, (gr->tpc_total << 8) | - gr->magic_not_rop_nr); + gr->screen_tile_row_offset); for (i = 0; i < 6; i++) nvkm_wr32(device, 0x418b08 + (i * 4), data[i]); /* GPC_BROADCAST.TP_BROADCAST */ nvkm_wr32(device, 0x41bfd0, (gr->tpc_total << 8) | - gr->magic_not_rop_nr | data2[0]); + gr->screen_tile_row_offset | data2[0]); nvkm_wr32(device, 0x41bfe4, data2[1]); for (i = 0; i < 6; i++) nvkm_wr32(device, 0x41bf00 + (i * 4), data[i]); /* UNK78xx */ nvkm_wr32(device, 0x4078bc, (gr->tpc_total << 8) | - gr->magic_not_rop_nr); + gr->screen_tile_row_offset); for (i = 0; i < 6; i++) nvkm_wr32(device, 0x40780c + (i * 4), data[i]); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c index 8206aecefc7d..086f56529d6d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c @@ -1651,38 +1651,38 @@ gf100_gr_oneinit(struct nvkm_gr *base) switch (device->chipset) { case 0xc0: if (gr->tpc_total == 11) { /* 465, 3/4/4/0, 4 */ - gr->magic_not_rop_nr = 0x07; + gr->screen_tile_row_offset = 0x07; } else if (gr->tpc_total == 14) { /* 470, 3/3/4/4, 5 */ - gr->magic_not_rop_nr = 0x05; + gr->screen_tile_row_offset = 0x05; } else if (gr->tpc_total == 15) { /* 480, 3/4/4/4, 6 */ - gr->magic_not_rop_nr = 0x06; + gr->screen_tile_row_offset = 0x06; } break; case 0xc3: /* 450, 4/0/0/0, 2 */ - gr->magic_not_rop_nr = 0x03; + gr->screen_tile_row_offset = 0x03; break; case 0xc4: /* 460, 3/4/0/0, 4 */ - gr->magic_not_rop_nr = 0x01; + gr->screen_tile_row_offset = 0x01; break; case 0xc1: /* 2/0/0/0, 1 */ - gr->magic_not_rop_nr = 0x01; + gr->screen_tile_row_offset = 0x01; break; case 0xc8: /* 4/4/3/4, 5 */ - gr->magic_not_rop_nr = 0x06; + gr->screen_tile_row_offset = 0x06; break; case 0xce: /* 4/4/0/0, 4 */ - gr->magic_not_rop_nr = 0x03; + gr->screen_tile_row_offset = 0x03; break; case 0xcf: /* 4/0/0/0, 3 */ - gr->magic_not_rop_nr = 0x03; + gr->screen_tile_row_offset = 0x03; break; case 0xd7: case 0xd9: /* 1/0/0/0, 1 */ case 0xea: /* gk20a */ case 0x12b: /* gm20b */ - gr->magic_not_rop_nr = 0x01; + gr->screen_tile_row_offset = 0x01; break; } @@ -1851,9 +1851,9 @@ gf100_gr_init(struct gf100_gr *gr) for (gpc = 0; gpc < gr->gpc_nr; gpc++) { nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), - gr->magic_not_rop_nr << 8 | gr->tpc_nr[gpc]); + gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | - gr->tpc_total); + gr->tpc_total); nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h index f0c6acb0f8fd..0c49193740f0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h @@ -108,7 +108,7 @@ struct gf100_gr { u32 size; u32 *data; - u8 magic_not_rop_nr; + u8 screen_tile_row_offset; }; int gf100_gr_ctor(const struct gf100_gr_func *, struct nvkm_device *, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c index abf54928a1a4..1be324ac2658 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c @@ -218,9 +218,9 @@ gk104_gr_init(struct gf100_gr *gr) for (gpc = 0; gpc < gr->gpc_nr; gpc++) { nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), - gr->magic_not_rop_nr << 8 | gr->tpc_nr[gpc]); + gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | - gr->tpc_total); + gr->tpc_total); nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c index 7ffb8a626196..8a43baf2d9ab 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c @@ -267,7 +267,7 @@ gk20a_gr_init(struct gf100_gr *gr) for (gpc = 0; gpc < gr->gpc_nr; gpc++) { nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), - gr->magic_not_rop_nr << 8 | gr->tpc_nr[gpc]); + gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | gr->tpc_total); nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c index 56e960212e5d..b410221628de 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c @@ -347,9 +347,9 @@ gm107_gr_init(struct gf100_gr *gr) for (gpc = 0; gpc < gr->gpc_nr; gpc++) { nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), - gr->magic_not_rop_nr << 8 | gr->tpc_nr[gpc]); + gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | - gr->tpc_total); + gr->tpc_total); nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c index 058fc1d22c09..ccc644605643 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c @@ -79,9 +79,9 @@ gm200_gr_init(struct gf100_gr *gr) for (gpc = 0; gpc < gr->gpc_nr; gpc++) { nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), - gr->magic_not_rop_nr << 8 | gr->tpc_nr[gpc]); + gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | - gr->tpc_total); + gr->tpc_total); nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); } -- 2.39.5