From 668f52c3039049cd293851599581c5eca745ec4e Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 15 Sep 2016 15:28:46 -0400 Subject: [PATCH] drm/amdgpu/gfx6: drop duplicate code MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The compute functions just called the gfx functions, drop the wrapper. Reviewed-by: Edward O'Callaghan Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 33 ++++++++------------------- 1 file changed, 9 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c index 9697994d3fff..3cf4e9eeea1c 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c @@ -1324,8 +1324,8 @@ static void gfx_v6_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring) amdgpu_ring_write(ring, 0x1); } -static void gfx_v6_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr, - u64 seq, unsigned flags) +static void gfx_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, + u64 seq, unsigned flags) { bool write64bit = flags & AMDGPU_FENCE_FLAG_64BIT; bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; @@ -1351,17 +1351,9 @@ static void gfx_v6_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr, amdgpu_ring_write(ring, upper_32_bits(seq)); } -static void gfx_v6_0_ring_emit_fence_compute(struct amdgpu_ring *ring, - u64 addr, u64 seq, - unsigned flags) -{ - gfx_v6_0_ring_emit_fence_gfx(ring, addr, seq, flags); -} - - -static void gfx_v6_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, - struct amdgpu_ib *ib, - unsigned vm_id, bool ctx_switch) +static void gfx_v6_0_ring_emit_ib(struct amdgpu_ring *ring, + struct amdgpu_ib *ib, + unsigned vm_id, bool ctx_switch) { u32 header, control = 0; @@ -1388,13 +1380,6 @@ static void gfx_v6_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, amdgpu_ring_write(ring, control); } -static void gfx_v6_0_ring_emit_ib_compute(struct amdgpu_ring *ring, - struct amdgpu_ib *ib, - unsigned vm_id, bool ctx_switch) -{ - gfx_v6_0_ring_emit_ib_gfx(ring, ib, vm_id, ctx_switch); -} - /** * gfx_v6_0_ring_test_ib - basic ring IB test * @@ -3119,8 +3104,8 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = { .get_wptr = gfx_v6_0_ring_get_wptr, .set_wptr = gfx_v6_0_ring_set_wptr_gfx, .parse_cs = NULL, - .emit_ib = gfx_v6_0_ring_emit_ib_gfx, - .emit_fence = gfx_v6_0_ring_emit_fence_gfx, + .emit_ib = gfx_v6_0_ring_emit_ib, + .emit_fence = gfx_v6_0_ring_emit_fence, .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync, .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush, .emit_gds_switch = gfx_v6_0_ring_emit_gds_switch, @@ -3136,8 +3121,8 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = { .get_wptr = gfx_v6_0_ring_get_wptr, .set_wptr = gfx_v6_0_ring_set_wptr_compute, .parse_cs = NULL, - .emit_ib = gfx_v6_0_ring_emit_ib_compute, - .emit_fence = gfx_v6_0_ring_emit_fence_compute, + .emit_ib = gfx_v6_0_ring_emit_ib, + .emit_fence = gfx_v6_0_ring_emit_fence, .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync, .emit_vm_flush = gfx_v6_0_ring_emit_vm_flush, .emit_gds_switch = gfx_v6_0_ring_emit_gds_switch, -- 2.39.5