From 66b50a00992dca97b442e016a9b2dba892e2df61 Mon Sep 17 00:00:00 2001 From: Oded Gabbay Date: Thu, 27 Jun 2013 12:00:05 -0400 Subject: [PATCH] mmc: esdhc: Add support for 8-bit bus width and non-removable card This patch adds support of connecting an MMC media using an 8-bit bus width connection to Freescale's P2020 H/W SDHC controller. During the probe function, the generic function mmc_of_parse is called to detect whether the controller is configured with 8-bit bus width. Also, the generic function detects if the non-removable property is set in the device tree. The function esdhc_pltfm_bus_width was added because the bus width configuration is platform specific. Signed-off-by: Oded Gabbay Reviewed-by: Anton Vorontsov Signed-off-by: Chris Ball --- drivers/mmc/host/sdhci-esdhc.h | 7 +++++ drivers/mmc/host/sdhci-of-esdhc.c | 44 ++++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h index 6f16406c37cd..a2a06420e463 100644 --- a/drivers/mmc/host/sdhci-esdhc.h +++ b/drivers/mmc/host/sdhci-esdhc.h @@ -36,6 +36,13 @@ /* pltfm-specific */ #define ESDHC_HOST_CONTROL_LE 0x20 +/* + * P2020 interpretation of the SDHCI_HOST_CONTROL register + */ +#define ESDHC_CTRL_4BITBUS (0x1 << 1) +#define ESDHC_CTRL_8BITBUS (0x2 << 1) +#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1) + /* OF-specific */ #define ESDHC_DMA_SYSCTL 0x40c #define ESDHC_DMA_SNOOP 0x00000040 diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index 2b7369729f91..b2a635e73aee 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c @@ -13,6 +13,7 @@ * your option) any later version. */ +#include #include #include #include @@ -230,6 +231,30 @@ static void esdhc_of_platform_init(struct sdhci_host *host) host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ; } +static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width) +{ + u32 ctrl; + + switch (width) { + case MMC_BUS_WIDTH_8: + ctrl = ESDHC_CTRL_8BITBUS; + break; + + case MMC_BUS_WIDTH_4: + ctrl = ESDHC_CTRL_4BITBUS; + break; + + default: + ctrl = 0; + break; + } + + clrsetbits_be32(host->ioaddr + SDHCI_HOST_CONTROL, + ESDHC_CTRL_BUSWIDTH_MASK, ctrl); + + return 0; +} + static const struct sdhci_ops sdhci_esdhc_ops = { .read_l = esdhc_readl, .read_w = esdhc_readw, @@ -247,6 +272,7 @@ static const struct sdhci_ops sdhci_esdhc_ops = { .platform_resume = esdhc_of_resume, #endif .adma_workaround = esdhci_of_adma_workaround, + .platform_bus_width = esdhc_pltfm_bus_width, }; static const struct sdhci_pltfm_data sdhci_esdhc_pdata = { @@ -262,7 +288,23 @@ static const struct sdhci_pltfm_data sdhci_esdhc_pdata = { static int sdhci_esdhc_probe(struct platform_device *pdev) { - return sdhci_pltfm_register(pdev, &sdhci_esdhc_pdata, 0); + struct sdhci_host *host; + int ret; + + host = sdhci_pltfm_init(pdev, &sdhci_esdhc_pdata, 0); + if (IS_ERR(host)) + return PTR_ERR(host); + + sdhci_get_of_property(pdev); + + /* call to generic mmc_of_parse to support additional capabilities */ + mmc_of_parse(host->mmc); + + ret = sdhci_add_host(host); + if (ret) + sdhci_pltfm_free(pdev); + + return ret; } static int sdhci_esdhc_remove(struct platform_device *pdev) -- 2.39.5