From 6aaa8b5570c7b5b9eb8913ec80263a1012b1dd66 Mon Sep 17 00:00:00 2001 From: Jon Medhurst Date: Thu, 16 Jun 2011 14:53:56 +0100 Subject: [PATCH] ARM: kprobes: Add it_advance() This advances the ITSTATE bits in CPSR to their values for the next instruction. Signed-off-by: Jon Medhurst Acked-by: Nicolas Pitre --- arch/arm/kernel/kprobes.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/kernel/kprobes.h b/arch/arm/kernel/kprobes.h index a84b14d8cdc..5e2485c4cac 100644 --- a/arch/arm/kernel/kprobes.h +++ b/arch/arm/kernel/kprobes.h @@ -68,6 +68,31 @@ void __init find_str_pc_offset(void); #endif +/* + * Update ITSTATE after normal execution of an IT block instruction. + * + * The 8 IT state bits are split into two parts in CPSR: + * ITSTATE<1:0> are in CPSR<26:25> + * ITSTATE<7:2> are in CPSR<15:10> + */ +static inline unsigned long it_advance(unsigned long cpsr) + { + if ((cpsr & 0x06000400) == 0) { + /* ITSTATE<2:0> == 0 means end of IT block, so clear IT state */ + cpsr &= ~PSR_IT_MASK; + } else { + /* We need to shift left ITSTATE<4:0> */ + const unsigned long mask = 0x06001c00; /* Mask ITSTATE<4:0> */ + unsigned long it = cpsr & mask; + it <<= 1; + it |= it >> (27 - 10); /* Carry ITSTATE<2> to correct place */ + it &= mask; + cpsr &= ~mask; + cpsr |= it; + } + return cpsr; +} + /* * Test if load/store instructions writeback the address register. * if P (bit 24) == 0 or W (bit 21) == 1 -- 2.39.5