From 6df7ec6186644a4ffb4f0c859327ef41a1145a5f Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 28 Oct 2015 10:55:19 +0100 Subject: [PATCH] ARM: dts: rockchip: add rk3288 displayport controller node Add the rk3288 edp node and its hooks into the display-subsystem. Signed-off-by: Heiko Stuebner Tested-by: Douglas Anderson --- arch/arm/boot/dts/rk3288.dtsi | 44 +++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 437dd263a753..688cb37b156e 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -830,6 +830,12 @@ reg = <0>; remote-endpoint = <&hdmi_in_vopb>; }; + + vopb_out_edp: endpoint@1 { + reg = <1>; + remote-endpoint = <&edp_in_vopb>; + }; + vopb_out_mipi: endpoint@2 { reg = <2>; remote-endpoint = <&mipi_in_vopb>; @@ -867,6 +873,12 @@ reg = <0>; remote-endpoint = <&hdmi_in_vopl>; }; + + vopl_out_edp: endpoint@1 { + reg = <1>; + remote-endpoint = <&edp_in_vopl>; + }; + vopl_out_mipi: endpoint@2 { reg = <2>; remote-endpoint = <&mipi_in_vopl>; @@ -912,6 +924,38 @@ }; }; + edp: dp@ff970000 { + compatible = "rockchip,rk3288-dp"; + reg = <0xff970000 0x4000>; + interrupts = ; + clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>; + clock-names = "dp", "pclk"; + phys = <&edp_phy>; + phy-names = "dp"; + resets = <&cru SRST_EDP>; + reset-names = "dp"; + rockchip,grf = <&grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + edp_in: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + edp_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_edp>; + }; + edp_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_edp>; + }; + }; + }; + }; + hdmi: hdmi@ff980000 { compatible = "rockchip,rk3288-dw-hdmi"; reg = <0xff980000 0x20000>; -- 2.39.5