From 6e761cd77b5c88ce2817d34088b7762aa40e1fd6 Mon Sep 17 00:00:00 2001 From: Matthew Gerlach Date: Thu, 23 Mar 2017 19:34:29 -0500 Subject: [PATCH] fpga dt: bindings for Altera Partial Reconfiguration IP. Device Tree bindings for Altera Partial Reconfiguration IP. Signed-off-by: Matthew Gerlach Acked-by: Rob Herring Acked-by: Alan Tull Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/fpga/altera-pr-ip.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt new file mode 100644 index 000000000000..52a294cf2730 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt @@ -0,0 +1,12 @@ +Altera Arria10 Partial Reconfiguration IP + +Required properties: +- compatible : should contain "altr,a10-pr-ip" +- reg : base address and size for memory mapped io. + +Example: + + fpga_mgr: fpga-mgr@ff20c000 { + compatible = "altr,a10-pr-ip"; + reg = <0xff20c000 0x10>; + }; -- 2.39.5