From 6e913c67b3eb93e2b8bc1dc0ff854f00a760f41b Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Tue, 21 Aug 2007 03:39:51 +1000 Subject: [PATCH] [POWERPC] bootwrapper: Add 16-bit I/O, sync(), eieio(), and barrier() Also, include types.h from io.h, so callers don't have to. Signed-off-by: Scott Wood Acked-by: David Gibson Signed-off-by: Paul Mackerras --- arch/powerpc/boot/io.h | 49 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/powerpc/boot/io.h b/arch/powerpc/boot/io.h index 32974ed49e02..ccaedaec50d5 100644 --- a/arch/powerpc/boot/io.h +++ b/arch/powerpc/boot/io.h @@ -1,5 +1,8 @@ #ifndef _IO_H #define __IO_H + +#include "types.h" + /* * Low-level I/O routines. * @@ -20,6 +23,37 @@ static inline void out_8(volatile unsigned char *addr, int val) : "=m" (*addr) : "r" (val)); } +static inline unsigned in_le16(const volatile u16 *addr) +{ + unsigned ret; + + __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync" + : "=r" (ret) : "r" (addr), "m" (*addr)); + + return ret; +} + +static inline unsigned in_be16(const volatile u16 *addr) +{ + unsigned ret; + + __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync" + : "=r" (ret) : "m" (*addr)); + return ret; +} + +static inline void out_le16(volatile u16 *addr, int val) +{ + __asm__ __volatile__("sthbrx %1,0,%2; sync" : "=m" (*addr) + : "r" (val), "r" (addr)); +} + +static inline void out_be16(volatile u16 *addr, int val) +{ + __asm__ __volatile__("sth%U0%X0 %1,%0; sync" + : "=m" (*addr) : "r" (val)); +} + static inline unsigned in_le32(const volatile unsigned *addr) { unsigned ret; @@ -50,4 +84,19 @@ static inline void out_be32(volatile unsigned *addr, int val) : "=m" (*addr) : "r" (val)); } +static inline void sync(void) +{ + asm volatile("sync" : : : "memory"); +} + +static inline void eieio(void) +{ + asm volatile("eieio" : : : "memory"); +} + +static inline void barrier(void) +{ + asm volatile("" : : : "memory"); +} + #endif /* _IO_H */ -- 2.39.2