From 73b2d0a8721a1c663acd22853f883dd71811f271 Mon Sep 17 00:00:00 2001 From: Wayne Zou Date: Thu, 16 Feb 2012 15:28:11 +0800 Subject: [PATCH] ENGR00174649 i.mx6dl: clock: set ipu1 clock to 270M, change ldb_di_clk parent Set ipu1 clock to 270M, source from pll3_pfd_540M for best performance. And set ldb_di_clk parent to pll2_pfd_352M. Signed-off-by: Wayne Zou --- arch/arm/mach-mx6/clock.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index c23009884da2..56f78392b785 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -5223,6 +5223,11 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc, /* on mx6dl gpu2d_axi_clk source from mmdc0 directly */ clk_set_parent(&gpu2d_axi_clk, &mmdc_ch0_axi_clk[0]); gpu2d_axi_clk.secondary = NULL; + + /* on mx6dl, max ipu clock is 274M */ + clk_set_parent(&ipu1_clk, &pll3_pfd_540M); + clk_set_parent(&ldb_di0_clk, &pll2_pfd_352M); + clk_set_parent(&ldb_di1_clk, &pll2_pfd_352M); } if (cpu_is_mx6q()) clk_set_parent(&gpu2d_core_clk[0], &pll3_usb_otg_main_clk); -- 2.39.2