From 7a42f492a3135a2b70a28595e417a2d390a0e920 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 23 Feb 2014 23:06:22 +1000 Subject: [PATCH] drm/nve0/fifo: mask unhandled intr bits when seen, rather than all intrs Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c index dbc3ff632e3e..6853cd2fa6fd 100644 --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c @@ -743,9 +743,9 @@ nve0_fifo_intr(struct nouveau_subdev *subdev) } if (stat) { - nv_fatal(priv, "unhandled status 0x%08x\n", stat); + nv_error(priv, "INTR 0x%08x\n", stat); + nv_mask(priv, 0x002140, stat, 0x00000000); nv_wr32(priv, 0x002100, stat); - nv_wr32(priv, 0x002140, 0); } } -- 2.39.2