From 7d1cd2978664ddb8fb5ee79d347108c213638f3a Mon Sep 17 00:00:00 2001 From: =?utf8?q?Lothar=20Wa=C3=9Fmann?= Date: Wed, 20 Jan 2016 11:09:05 +0100 Subject: [PATCH] ARM: dts: imx6ul: add gpmi support MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Add the device node for the i.MX6UL GPMI interface and the related APBH DMA which is necessary for the GPMI to work properly. Signed-off-by: Lothar Waßmann Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 985c1b1b6ffd..8499b3db18a5 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -141,6 +141,39 @@ reg = <0x00900000 0x20000>; }; + dma_apbh: dma-apbh@01804000 { + compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; + reg = <0x01804000 0x2000>; + interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>, + <0 13 IRQ_TYPE_LEVEL_HIGH>, + <0 13 IRQ_TYPE_LEVEL_HIGH>, + <0 13 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; + #dma-cells = <1>; + dma-channels = <4>; + clocks = <&clks IMX6UL_CLK_APBHDMA>; + }; + + gpmi: gpmi-nand@01806000 { + compatible = "fsl,imx6q-gpmi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x01806000 0x2000>, <0x01808000 0x2000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "bch"; + clocks = <&clks IMX6UL_CLK_GPMI_IO>, + <&clks IMX6UL_CLK_GPMI_APB>, + <&clks IMX6UL_CLK_GPMI_BCH>, + <&clks IMX6UL_CLK_GPMI_BCH_APB>, + <&clks IMX6UL_CLK_PER_BCH>; + clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", + "gpmi_bch_apb", "per1_bch"; + dmas = <&dma_apbh 0>; + dma-names = "rx-tx"; + status = "disabled"; + }; + aips1: aips-bus@02000000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; -- 2.39.5