From 83796f2652bc31170eee5563e37c6af92db41de9 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Micha=C5=82=20Winiarski?= Date: Wed, 11 Jan 2017 16:17:39 +0100 Subject: [PATCH] drm/i915/guc: Make sure vma containing firmware is GuC mappable MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Since commit 4741da925fa3 ("drm/i915/guc: Assert that all GGTT offsets used by the GuC are mappable"), we're asserting that GuC firmware is in the GuC mappable range. Except we're not pinning the object with bias, which means it's possible to trigger this assert. Let's add a proper bias. Fixes: 4741da925fa3 ("drm/i915/guc: Assert that all GGTT offsets used by the GuC are mappable") Cc: Chris Wilson Cc: Daniele Ceraolo Spurio Signed-off-by: Michał Winiarski Reviewed-by: Chris Wilson Tested-by: Tomi Sarvela Signed-off-by: Chris Wilson Link: http://patchwork.freedesktop.org/patch/msgid/20170111151739.28965-1-michal.winiarski@intel.com --- drivers/gpu/drm/i915/intel_guc_loader.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index aa2b866474be..5a6ab8728d48 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -360,7 +360,8 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv) return ret; } - vma = i915_gem_object_ggtt_pin(guc_fw->guc_fw_obj, NULL, 0, 0, 0); + vma = i915_gem_object_ggtt_pin(guc_fw->guc_fw_obj, NULL, 0, 0, + PIN_OFFSET_BIAS | GUC_WOPCM_TOP); if (IS_ERR(vma)) { DRM_DEBUG_DRIVER("pin failed %d\n", (int)PTR_ERR(vma)); return PTR_ERR(vma); -- 2.39.5