From 84c3b87b8b669e2d42209ba9fc9ddeffb90b3f17 Mon Sep 17 00:00:00 2001 From: Nicholas Mc Guire Date: Sat, 4 Apr 2015 04:39:08 +0200 Subject: [PATCH] drm/msm: fix HZ dependency of timeout The timeout is passed as a constant which makes it HZ dependent because jiffies are expected so it should be converted to jiffies. The actual value is not clear from the code - my best guess is that this should be 300 milliseconds given that other timeouts are in milliseconds based on looking at other drm drivers (e.g. exynos_drm_dsi.c:356 300ms, tegra/dpaux.c:188 250ms) - this needs to be confirmed by someone who knows the details of the driver. Signed-off-by: Nicholas Mc Guire Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/edp/edp_aux.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/edp/edp_aux.c b/drivers/gpu/drm/msm/edp/edp_aux.c index 5f77bf0adf1d..d950839edf91 100644 --- a/drivers/gpu/drm/msm/edp/edp_aux.c +++ b/drivers/gpu/drm/msm/edp/edp_aux.c @@ -148,7 +148,8 @@ ssize_t edp_aux_transfer(struct drm_dp_aux *drm_aux, struct drm_dp_aux_msg *msg) goto unlock_exit; DBG("wait_for_completion"); - time_left = wait_for_completion_timeout(&aux->msg_comp, 300); + time_left = wait_for_completion_timeout(&aux->msg_comp, + msecs_to_jiffies(300)); if (!time_left) { /* * Clear GO and reset AUX channel -- 2.39.5