From 86f9abb6ec730441731bc5aff3e3865c9186bb13 Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Thu, 6 Nov 2014 13:01:41 +0100 Subject: [PATCH] ARM: dts: omap3-igep00x0: Fix UART2 pins that aren't common. UART2 is used to connect the processor with the bluetooth chip, these pins are not common between IGEPv2 boards and IGEP COM MODULE boards. This patch muxes the correct pins for every board and removes UART2 configuration from common omap3-igep.dtsi file. Signed-off-by: Enric Balletbo i Serra Acked-by: Javier Martinez Canillas Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-igep.dtsi | 12 ------------ arch/arm/boot/dts/omap3-igep0020.dts | 14 ++++++++++++++ arch/arm/boot/dts/omap3-igep0030.dts | 16 ++++++++++++++++ 3 files changed, 30 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index e2d163bf0619..fb1040da4c9e 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -53,13 +53,6 @@ >; }; - uart2_pins: pinmux_uart2_pins { - pinctrl-single,pins = < - 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ - 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ - >; - }; - uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ @@ -198,11 +191,6 @@ pinctrl-0 = <&uart1_pins>; }; -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; -}; - &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index cc9343e836c6..87d77e4ce6f8 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -149,6 +149,15 @@ 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ >; }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ + OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ + OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ + OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ + >; + }; }; &omap3_pmx_core2 { @@ -256,6 +265,11 @@ }; }; +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; + &usbhshost { port1-mode = "ehci-phy"; }; diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index 84b74527c544..2df13964f7e7 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -46,6 +46,17 @@ }; }; +&omap3_pmx_core { + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */ + OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */ + OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clk.uart2_tx */ + OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */ + >; + }; +}; + &omap3_pmx_core2 { leds_pins: pinmux_leds_pins { pinctrl-single,pins = < @@ -104,3 +115,8 @@ }; }; }; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; -- 2.39.5