From 937ad1042572bb3641fcbbc477f5c6b137b3a5e0 Mon Sep 17 00:00:00 2001 From: Kevin Cernekee Date: Mon, 3 Jun 2013 14:39:34 +0000 Subject: [PATCH] MIPS: BCM63XX: Handle SW IRQs 0-1 MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI) on BMIPS SMP. Make the board support code aware of them. Signed-off-by: Kevin Cernekee [jogo@openwrt.org: move sw irqs behind timer irq] Signed-off-by: Jonas Gorski Cc: linux-mips@linux-mips.org Cc: John Crispin Cc: Maxime Bizon Cc: Florian Fainelli Patchwork: https://patchwork.linux-mips.org/patch/5354/ Signed-off-by: Ralf Baechle --- arch/mips/bcm63xx/irq.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index c0ab3887f42e..d744606e19e9 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -294,6 +294,10 @@ asmlinkage void plat_irq_dispatch(void) if (cause & CAUSEF_IP7) do_IRQ(7); + if (cause & CAUSEF_IP0) + do_IRQ(0); + if (cause & CAUSEF_IP1) + do_IRQ(1); if (cause & CAUSEF_IP2) dispatch_internal(); if (!is_ext_irq_cascaded) { -- 2.39.5