From 989240eeeb0db5e21bf40e0fb2dd669eea0fa12a Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 31 Jul 2013 10:24:07 +0800 Subject: [PATCH] ENGR00240988: ARM: imx6q: add dma_zone_size for GPU limit GPU has a limit on physical address that it accesses, which must be below 2GiB. Since i.MX6Q/DL maps system memory at 0x10000000 (offset 256MiB), we set dma_zone_size as (SZ_2G - SZ_256M) to ensure that. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 1 + arch/arm/mach-imx/mach-imx6q.c | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 14ddf5e31dc9..943ce138c2fb 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -814,6 +814,7 @@ config SOC_IMX6Q select PL310_ERRATA_727915 if CACHE_PL310 select PL310_ERRATA_769419 if CACHE_PL310 select PM_OPP if PM + select ZONE_DMA help This enables support for Freescale i.MX6 Quad processor. diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 137ac61881e5..e04abe9baafa 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -305,6 +305,12 @@ static const char *imx6q_dt_compat[] __initdata = { }; DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad/DualLite (Device Tree)") + /* + * i.MX6Q/DL maps system memory at 0x10000000 (offset 256MiB), and + * GPU has a limit on physical address that it accesses, which must + * be below 2GiB. + */ + .dma_zone_size = (SZ_2G - SZ_256M), .smp = smp_ops(imx_smp_ops), .map_io = imx6q_map_io, .init_irq = imx6q_init_irq, -- 2.39.5