From a2b076b6e4890b693fed709f6d68a44f42875a3f Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Wed, 4 Sep 2013 18:25:18 +0300 Subject: [PATCH] drm/i915: Grab the pixel clock from adjusted_mode not requested_mode MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit i9xx_set_pipeconf() attempts to get the current pixel clock from requested_mode. requested_mode.clock may be totally bogus, so the clock should come from adjusted_mode. v2: Dropped the intel_compute_config() hunk due to killing of the INTEL_FDI_FREQ check Signed-off-by: Ville Syrjälä Reviewed-by: Damien Lespiau Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c2a4d7b491d8..3ff9d98c7820 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4809,7 +4809,7 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc) * XXX: No double-wide on 915GM pipe B. Is that the only reason for the * pipe == 0 check? */ - if (intel_crtc->config.requested_mode.clock > + if (intel_crtc->config.adjusted_mode.clock > dev_priv->display.get_display_clock_speed(dev) * 9 / 10) pipeconf |= PIPECONF_DOUBLE_WIDE; } -- 2.39.5