From a2e50f53d535fa885a432fb9fc3e3ca5ed97364c Mon Sep 17 00:00:00 2001 From: Joshua Kinard Date: Mon, 19 Jan 2015 04:19:20 -0500 Subject: [PATCH] MIPS: PCI: Add a hook for IORESOURCE_BUS in pci_controller/bridge_controller On SGI Origin 2k/Onyx2 and SGI Octane systems, there can exist multiple PCI buses attached to the Xtalk bus. The current code will stop counting PCI buses after it finds the first one. If one installs the optional PCI cardcage ("shoebox") into these systems, because of the order of the Xtalk widgets, the current PCI code will find the cardcage first, and fail to detect the BaseIO PCI devices, which are on a higher Xtalk widget ID. This patch adds the hooks needed for resolving this issue in the IP27 PCI code (in a later patch). Verified on both an SGI Onyx2 and an SGI Octane. Signed-off-by: Joshua Kinard Cc: Linux MIPS List Patchwork: https://patchwork.linux-mips.org/patch/9074/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/pci.h | 2 ++ arch/mips/include/asm/pci/bridge.h | 1 + arch/mips/pci/pci.c | 5 ++++- 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h index 193b4c6b7541..d9692993fc83 100644 --- a/arch/mips/include/asm/pci.h +++ b/arch/mips/include/asm/pci.h @@ -35,6 +35,8 @@ struct pci_controller { struct resource *io_resource; unsigned long io_offset; unsigned long io_map_base; + struct resource *busn_resource; + unsigned long busn_offset; unsigned int index; /* For compatibility with current (as of July 2003) pciutils diff --git a/arch/mips/include/asm/pci/bridge.h b/arch/mips/include/asm/pci/bridge.h index af2c8a351ca7..8d7a63b52ac7 100644 --- a/arch/mips/include/asm/pci/bridge.h +++ b/arch/mips/include/asm/pci/bridge.h @@ -835,6 +835,7 @@ struct bridge_controller { struct pci_controller pc; struct resource mem; struct resource io; + struct resource busn; bridge_t *base; nasid_t nasid; unsigned int widget_id; diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 1bf60b127377..0e3f437e8cad 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c @@ -91,7 +91,10 @@ static void pcibios_scanbus(struct pci_controller *hose) pci_add_resource_offset(&resources, hose->mem_resource, hose->mem_offset); - pci_add_resource_offset(&resources, hose->io_resource, hose->io_offset); + pci_add_resource_offset(&resources, + hose->io_resource, hose->io_offset); + pci_add_resource_offset(&resources, + hose->busn_resource, hose->busn_offset); bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, &resources); if (!bus) -- 2.39.5