From ad8fb5537a7747187e92434dc096d3914472b51b Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 22 Apr 2014 15:51:55 +0200 Subject: [PATCH] MIPS: math-emu: Replace DP_MBITS with DP_FBITS and SP_MBITS with SP_FBITS. Both were defined as 23 rsp. 52 though the mentissa is actually a bit more than the fraction. Signed-off-by: Ralf Baechle --- arch/mips/math-emu/dp_add.c | 4 ++-- arch/mips/math-emu/dp_div.c | 4 ++-- arch/mips/math-emu/dp_fint.c | 4 ++-- arch/mips/math-emu/dp_flong.c | 8 ++++---- arch/mips/math-emu/dp_fsp.c | 8 ++++---- arch/mips/math-emu/dp_modf.c | 8 ++++---- arch/mips/math-emu/dp_mul.c | 12 ++++++------ arch/mips/math-emu/dp_sub.c | 4 ++-- arch/mips/math-emu/dp_tint.c | 10 +++++----- arch/mips/math-emu/dp_tlong.c | 10 +++++----- arch/mips/math-emu/ieee754dp.c | 14 +++++++------- arch/mips/math-emu/ieee754dp.h | 6 +++--- arch/mips/math-emu/ieee754int.h | 12 ++++++------ arch/mips/math-emu/ieee754sp.c | 14 +++++++------- arch/mips/math-emu/ieee754sp.h | 8 ++++---- arch/mips/math-emu/sp_add.c | 4 ++-- arch/mips/math-emu/sp_div.c | 4 ++-- arch/mips/math-emu/sp_fdp.c | 8 ++++---- arch/mips/math-emu/sp_fint.c | 8 ++++---- arch/mips/math-emu/sp_flong.c | 8 ++++---- arch/mips/math-emu/sp_modf.c | 8 ++++---- arch/mips/math-emu/sp_mul.c | 12 ++++++------ arch/mips/math-emu/sp_sub.c | 4 ++-- arch/mips/math-emu/sp_tint.c | 8 ++++---- arch/mips/math-emu/sp_tlong.c | 10 +++++----- 25 files changed, 100 insertions(+), 100 deletions(-) diff --git a/arch/mips/math-emu/dp_add.c b/arch/mips/math-emu/dp_add.c index 7daaafcfeb78..f1c8e70e8beb 100644 --- a/arch/mips/math-emu/dp_add.c +++ b/arch/mips/math-emu/dp_add.c @@ -153,7 +153,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y) xe = xe; xs = xs; - if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */ + if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */ xm = XDPSRS1(xm); xe++; } @@ -172,7 +172,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y) IEEE754_RD); /* normalize to rounding precision */ - while ((xm >> (DP_MBITS + 3)) == 0) { + while ((xm >> (DP_FBITS + 3)) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/dp_div.c b/arch/mips/math-emu/dp_div.c index 3b568b718d52..13ecffa9c25e 100644 --- a/arch/mips/math-emu/dp_div.c +++ b/arch/mips/math-emu/dp_div.c @@ -129,7 +129,7 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y) int re = xe - ye; u64 bm; - for (bm = DP_MBIT(DP_MBITS + 2); bm; bm >>= 1) { + for (bm = DP_MBIT(DP_FBITS + 2); bm; bm >>= 1) { if (xm >= ym) { xm -= ym; rm |= bm; @@ -146,7 +146,7 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y) /* normalise rm to rounding precision ? */ - while ((rm >> (DP_MBITS + 3)) == 0) { + while ((rm >> (DP_FBITS + 3)) == 0) { rm <<= 1; re--; } diff --git a/arch/mips/math-emu/dp_fint.c b/arch/mips/math-emu/dp_fint.c index 4b5ee799b4a4..196a010ff09d 100644 --- a/arch/mips/math-emu/dp_fint.c +++ b/arch/mips/math-emu/dp_fint.c @@ -52,8 +52,8 @@ union ieee754dp ieee754dp_fint(int x) } /* normalize - result can never be inexact or overflow */ - xe = DP_MBITS; - while ((xm >> DP_MBITS) == 0) { + xe = DP_FBITS; + while ((xm >> DP_FBITS) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/dp_flong.c b/arch/mips/math-emu/dp_flong.c index 89bd57917c94..915072d82c20 100644 --- a/arch/mips/math-emu/dp_flong.c +++ b/arch/mips/math-emu/dp_flong.c @@ -52,15 +52,15 @@ union ieee754dp ieee754dp_flong(s64 x) } /* normalize */ - xe = DP_MBITS + 3; - if (xm >> (DP_MBITS + 1 + 3)) { + xe = DP_FBITS + 3; + if (xm >> (DP_FBITS + 1 + 3)) { /* shunt out overflow bits */ - while (xm >> (DP_MBITS + 1 + 3)) { + while (xm >> (DP_FBITS + 1 + 3)) { XDPSRSX1(); } } else { /* normalize in grs extended double precision */ - while ((xm >> (DP_MBITS + 3)) == 0) { + while ((xm >> (DP_FBITS + 3)) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/dp_fsp.c b/arch/mips/math-emu/dp_fsp.c index cacd9f328690..7ddb506153e1 100644 --- a/arch/mips/math-emu/dp_fsp.c +++ b/arch/mips/math-emu/dp_fsp.c @@ -44,8 +44,8 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x) return ieee754dp_nanxcpt(builddp(xs, DP_EMAX + 1 + DP_EBIAS, ((u64) xm - << (DP_MBITS - - SP_MBITS))), "fsp", + << (DP_FBITS - + SP_FBITS))), "fsp", x); case IEEE754_CLASS_INF: return ieee754dp_inf(xs); @@ -53,7 +53,7 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x) return ieee754dp_zero(xs); case IEEE754_CLASS_DNORM: /* normalize */ - while ((xm >> SP_MBITS) == 0) { + while ((xm >> SP_FBITS) == 0) { xm <<= 1; xe--; } @@ -69,5 +69,5 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x) xm &= ~SP_HIDDEN_BIT; return builddp(xs, xe + DP_EBIAS, - (u64) xm << (DP_MBITS - SP_MBITS)); + (u64) xm << (DP_FBITS - SP_FBITS)); } diff --git a/arch/mips/math-emu/dp_modf.c b/arch/mips/math-emu/dp_modf.c index 61733ff512c7..d83ec44f1a33 100644 --- a/arch/mips/math-emu/dp_modf.c +++ b/arch/mips/math-emu/dp_modf.c @@ -54,24 +54,24 @@ union ieee754dp ieee754dp_modf(union ieee754dp x, union ieee754dp *ip) *ip = ieee754dp_zero(xs); return x; } - if (xe >= DP_MBITS) { + if (xe >= DP_FBITS) { *ip = x; return ieee754dp_zero(xs); } /* generate ipart mantissa by clearing bottom bits */ *ip = builddp(xs, xe + DP_EBIAS, - ((xm >> (DP_MBITS - xe)) << (DP_MBITS - xe)) & + ((xm >> (DP_FBITS - xe)) << (DP_FBITS - xe)) & ~DP_HIDDEN_BIT); /* generate fpart mantissa by clearing top bits * and normalizing (must be able to normalize) */ - xm = (xm << (64 - (DP_MBITS - xe))) >> (64 - (DP_MBITS - xe)); + xm = (xm << (64 - (DP_FBITS - xe))) >> (64 - (DP_FBITS - xe)); if (xm == 0) return ieee754dp_zero(xs); - while ((xm >> DP_MBITS) == 0) { + while ((xm >> DP_FBITS) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c index 8f1bef91aa95..56fb309b42c1 100644 --- a/arch/mips/math-emu/dp_mul.c +++ b/arch/mips/math-emu/dp_mul.c @@ -113,8 +113,8 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y) u64 rm; /* shunt to top of word */ - xm <<= 64 - (DP_MBITS + 1); - ym <<= 64 - (DP_MBITS + 1); + xm <<= 64 - (DP_FBITS + 1); + ym <<= 64 - (DP_FBITS + 1); /* multiply 32bits xm,ym to give high 32bits rm with stickness */ @@ -162,13 +162,13 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y) */ if ((s64) rm < 0) { rm = - (rm >> (64 - (DP_MBITS + 1 + 3))) | - ((rm << (DP_MBITS + 1 + 3)) != 0); + (rm >> (64 - (DP_FBITS + 1 + 3))) | + ((rm << (DP_FBITS + 1 + 3)) != 0); re++; } else { rm = - (rm >> (64 - (DP_MBITS + 1 + 3 + 1))) | - ((rm << (DP_MBITS + 1 + 3 + 1)) != 0); + (rm >> (64 - (DP_FBITS + 1 + 3 + 1))) | + ((rm << (DP_FBITS + 1 + 3 + 1)) != 0); } assert(rm & (DP_HIDDEN_BIT << 3)); DPNORMRET2(rs, re, rm, "mul", x, y); diff --git a/arch/mips/math-emu/dp_sub.c b/arch/mips/math-emu/dp_sub.c index e369c7b07f5e..25d25bc8d977 100644 --- a/arch/mips/math-emu/dp_sub.c +++ b/arch/mips/math-emu/dp_sub.c @@ -158,7 +158,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y) xe = xe; xs = xs; - if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */ + if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */ xm = XDPSRS1(xm); /* shift preserving sticky */ xe++; } @@ -181,7 +181,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y) /* normalize to rounding precision */ - while ((xm >> (DP_MBITS + 3)) == 0) { + while ((xm >> (DP_FBITS + 3)) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/dp_tint.c b/arch/mips/math-emu/dp_tint.c index 792470c53779..8c39a40d7fe9 100644 --- a/arch/mips/math-emu/dp_tint.c +++ b/arch/mips/math-emu/dp_tint.c @@ -54,9 +54,9 @@ int ieee754dp_tint(union ieee754dp x) return ieee754si_xcpt(ieee754si_indef(), "dp_tint", x); } /* oh gawd */ - if (xe > DP_MBITS) { - xm <<= xe - DP_MBITS; - } else if (xe < DP_MBITS) { + if (xe > DP_FBITS) { + xm <<= xe - DP_FBITS; + } else if (xe < DP_FBITS) { u64 residue; int round; int sticky; @@ -68,10 +68,10 @@ int ieee754dp_tint(union ieee754dp x) sticky = residue != 0; xm = 0; } else { - residue = xm << (64 - DP_MBITS + xe); + residue = xm << (64 - DP_FBITS + xe); round = (residue >> 63) != 0; sticky = (residue << 1) != 0; - xm >>= DP_MBITS - xe; + xm >>= DP_FBITS - xe; } /* Note: At this point upper 32 bits of xm are guaranteed to be zero */ diff --git a/arch/mips/math-emu/dp_tlong.c b/arch/mips/math-emu/dp_tlong.c index fcc1c4f50e98..2653b6eac689 100644 --- a/arch/mips/math-emu/dp_tlong.c +++ b/arch/mips/math-emu/dp_tlong.c @@ -57,9 +57,9 @@ s64 ieee754dp_tlong(union ieee754dp x) return ieee754di_xcpt(ieee754di_indef(), "dp_tlong", x); } /* oh gawd */ - if (xe > DP_MBITS) { - xm <<= xe - DP_MBITS; - } else if (xe < DP_MBITS) { + if (xe > DP_FBITS) { + xm <<= xe - DP_FBITS; + } else if (xe < DP_FBITS) { u64 residue; int round; int sticky; @@ -75,10 +75,10 @@ s64 ieee754dp_tlong(union ieee754dp x) * so we do it in two steps. Be aware that xe * may be -1 */ residue = xm << (xe + 1); - residue <<= 63 - DP_MBITS; + residue <<= 63 - DP_FBITS; round = (residue >> 63) != 0; sticky = (residue << 1) != 0; - xm >>= DP_MBITS - xe; + xm >>= DP_FBITS - xe; } odd = (xm & 0x1) != 0x0; switch (ieee754_csr.rm) { diff --git a/arch/mips/math-emu/ieee754dp.c b/arch/mips/math-emu/ieee754dp.c index a8eb0142ca17..9be2d7836f81 100644 --- a/arch/mips/math-emu/ieee754dp.c +++ b/arch/mips/math-emu/ieee754dp.c @@ -43,7 +43,7 @@ int ieee754dp_isnan(union ieee754dp x) int ieee754dp_issnan(union ieee754dp x) { assert(ieee754dp_isnan(x)); - return ((DPMANT(x) & DP_MBIT(DP_MBITS-1)) == DP_MBIT(DP_MBITS-1)); + return ((DPMANT(x) & DP_MBIT(DP_FBITS-1)) == DP_MBIT(DP_FBITS-1)); } @@ -73,7 +73,7 @@ union ieee754dp __cold ieee754dp_nanxcpt(union ieee754dp r, const char *op, ...) if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) { /* not enabled convert to a quiet NaN */ - DPMANT(r) &= (~DP_MBIT(DP_MBITS-1)); + DPMANT(r) &= (~DP_MBIT(DP_FBITS-1)); if (ieee754dp_isnan(r)) return r; else @@ -136,7 +136,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm) { assert(xm); /* we don't gen exact zeros (probably should) */ - assert((xm >> (DP_MBITS + 1 + 3)) == 0); /* no execess */ + assert((xm >> (DP_FBITS + 1 + 3)) == 0); /* no execess */ assert(xm & (DP_HIDDEN_BIT << 3)); if (xe < DP_EMIN) { @@ -165,7 +165,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm) } if (xe == DP_EMIN - 1 - && get_rounding(sn, xm) >> (DP_MBITS + 1 + 3)) + && get_rounding(sn, xm) >> (DP_FBITS + 1 + 3)) { /* Not tiny after rounding */ ieee754_setcx(IEEE754_INEXACT); @@ -195,7 +195,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm) xm = get_rounding(sn, xm); /* adjust exponent for rounding add overflowing */ - if (xm >> (DP_MBITS + 3 + 1)) { + if (xm >> (DP_FBITS + 3 + 1)) { /* add causes mantissa overflow */ xm >>= 1; xe++; @@ -204,7 +204,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm) /* strip grs bits */ xm >>= 3; - assert((xm >> (DP_MBITS + 1)) == 0); /* no execess */ + assert((xm >> (DP_FBITS + 1)) == 0); /* no execess */ assert(xe >= DP_EMIN); if (xe > DP_EMAX) { @@ -237,7 +237,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm) ieee754_setcx(IEEE754_UNDERFLOW); return builddp(sn, DP_EMIN - 1 + DP_EBIAS, xm); } else { - assert((xm >> (DP_MBITS + 1)) == 0); /* no execess */ + assert((xm >> (DP_FBITS + 1)) == 0); /* no execess */ assert(xm & DP_HIDDEN_BIT); return builddp(sn, xe + DP_EBIAS, xm & ~DP_HIDDEN_BIT); diff --git a/arch/mips/math-emu/ieee754dp.h b/arch/mips/math-emu/ieee754dp.h index 1dc205880cba..f8f358a9072c 100644 --- a/arch/mips/math-emu/ieee754dp.h +++ b/arch/mips/math-emu/ieee754dp.h @@ -32,7 +32,7 @@ /* 3bit extended double precision sticky right shift */ #define XDPSRS(v,rs) \ - ((rs > (DP_MBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0)) + ((rs > (DP_FBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0)) #define XDPSRSX1() \ (xe++, (xm = (xm >> 1) | (xm & 1))) @@ -42,7 +42,7 @@ /* convert denormal to normalized with extended exponent */ #define DPDNORMx(m,e) \ - while ((m >> DP_MBITS) == 0) { m <<= 1; e--; } + while ((m >> DP_FBITS) == 0) { m <<= 1; e--; } #define DPDNORMX DPDNORMx(xm, xe) #define DPDNORMY DPDNORMx(ym, ye) @@ -53,7 +53,7 @@ static inline union ieee754dp builddp(int s, int bx, u64 m) assert((s) == 0 || (s) == 1); assert((bx) >= DP_EMIN - 1 + DP_EBIAS && (bx) <= DP_EMAX + 1 + DP_EBIAS); - assert(((m) >> DP_MBITS) == 0); + assert(((m) >> DP_FBITS) == 0); r.parts.sign = s; r.parts.bexp = bx; diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h index 39c40d275825..543e8f0b5a97 100644 --- a/arch/mips/math-emu/ieee754int.h +++ b/arch/mips/math-emu/ieee754int.h @@ -31,19 +31,19 @@ #define DP_EBIAS 1023 #define DP_EMIN (-1022) #define DP_EMAX 1023 -#define DP_MBITS 52 +#define DP_FBITS 52 #define SP_EBIAS 127 #define SP_EMIN (-126) #define SP_EMAX 127 -#define SP_MBITS 23 +#define SP_FBITS 23 #define DP_MBIT(x) ((u64)1 << (x)) -#define DP_HIDDEN_BIT DP_MBIT(DP_MBITS) +#define DP_HIDDEN_BIT DP_MBIT(DP_FBITS) #define DP_SIGN_BIT DP_MBIT(63) #define SP_MBIT(x) ((u32)1 << (x)) -#define SP_HIDDEN_BIT SP_MBIT(SP_MBITS) +#define SP_HIDDEN_BIT SP_MBIT(SP_FBITS) #define SP_SIGN_BIT SP_MBIT(31) @@ -94,7 +94,7 @@ static inline int ieee754_tstx(void) if (ve == SP_EMAX+1+SP_EBIAS) { \ if (vm == 0) \ vc = IEEE754_CLASS_INF; \ - else if (vm & SP_MBIT(SP_MBITS-1)) \ + else if (vm & SP_MBIT(SP_FBITS-1)) \ vc = IEEE754_CLASS_SNAN; \ else \ vc = IEEE754_CLASS_QNAN; \ @@ -128,7 +128,7 @@ static inline int ieee754_tstx(void) if (ve == DP_EMAX+1+DP_EBIAS) { \ if (vm == 0) \ vc = IEEE754_CLASS_INF; \ - else if (vm & DP_MBIT(DP_MBITS-1)) \ + else if (vm & DP_MBIT(DP_FBITS-1)) \ vc = IEEE754_CLASS_SNAN; \ else \ vc = IEEE754_CLASS_QNAN; \ diff --git a/arch/mips/math-emu/ieee754sp.c b/arch/mips/math-emu/ieee754sp.c index ed62ffeeb61e..5b435ec8ae25 100644 --- a/arch/mips/math-emu/ieee754sp.c +++ b/arch/mips/math-emu/ieee754sp.c @@ -43,7 +43,7 @@ int ieee754sp_isnan(union ieee754sp x) int ieee754sp_issnan(union ieee754sp x) { assert(ieee754sp_isnan(x)); - return (SPMANT(x) & SP_MBIT(SP_MBITS-1)); + return (SPMANT(x) & SP_MBIT(SP_FBITS-1)); } @@ -74,7 +74,7 @@ union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r, const char *op, ...) if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) { /* not enabled convert to a quiet NaN */ - SPMANT(r) &= (~SP_MBIT(SP_MBITS-1)); + SPMANT(r) &= (~SP_MBIT(SP_FBITS-1)); if (ieee754sp_isnan(r)) return r; else @@ -137,7 +137,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm) { assert(xm); /* we don't gen exact zeros (probably should) */ - assert((xm >> (SP_MBITS + 1 + 3)) == 0); /* no execess */ + assert((xm >> (SP_FBITS + 1 + 3)) == 0); /* no execess */ assert(xm & (SP_HIDDEN_BIT << 3)); if (xe < SP_EMIN) { @@ -166,7 +166,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm) } if (xe == SP_EMIN - 1 - && get_rounding(sn, xm) >> (SP_MBITS + 1 + 3)) + && get_rounding(sn, xm) >> (SP_FBITS + 1 + 3)) { /* Not tiny after rounding */ ieee754_setcx(IEEE754_INEXACT); @@ -194,7 +194,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm) xm = get_rounding(sn, xm); /* adjust exponent for rounding add overflowing */ - if (xm >> (SP_MBITS + 1 + 3)) { + if (xm >> (SP_FBITS + 1 + 3)) { /* add causes mantissa overflow */ xm >>= 1; xe++; @@ -203,7 +203,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm) /* strip grs bits */ xm >>= 3; - assert((xm >> (SP_MBITS + 1)) == 0); /* no execess */ + assert((xm >> (SP_FBITS + 1)) == 0); /* no execess */ assert(xe >= SP_EMIN); if (xe > SP_EMAX) { @@ -236,7 +236,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm) ieee754_setcx(IEEE754_UNDERFLOW); return buildsp(sn, SP_EMIN - 1 + SP_EBIAS, xm); } else { - assert((xm >> (SP_MBITS + 1)) == 0); /* no execess */ + assert((xm >> (SP_FBITS + 1)) == 0); /* no execess */ assert(xm & SP_HIDDEN_BIT); return buildsp(sn, xe + SP_EBIAS, xm & ~SP_HIDDEN_BIT); diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h index 011d034fd86e..075ea1891280 100644 --- a/arch/mips/math-emu/ieee754sp.h +++ b/arch/mips/math-emu/ieee754sp.h @@ -33,21 +33,21 @@ /* 3bit extended single precision sticky right shift */ #define SPXSRSXn(rs) \ (xe += rs, \ - xm = (rs > (SP_MBITS+3))?1:((xm) >> (rs)) | ((xm) << (32-(rs)) != 0)) + xm = (rs > (SP_FBITS+3))?1:((xm) >> (rs)) | ((xm) << (32-(rs)) != 0)) #define SPXSRSX1() \ (xe++, (xm = (xm >> 1) | (xm & 1))) #define SPXSRSYn(rs) \ (ye+=rs, \ - ym = (rs > (SP_MBITS+3))?1:((ym) >> (rs)) | ((ym) << (32-(rs)) != 0)) + ym = (rs > (SP_FBITS+3))?1:((ym) >> (rs)) | ((ym) << (32-(rs)) != 0)) #define SPXSRSY1() \ (ye++, (ym = (ym >> 1) | (ym & 1))) /* convert denormal to normalized with extended exponent */ #define SPDNORMx(m,e) \ - while ((m >> SP_MBITS) == 0) { m <<= 1; e--; } + while ((m >> SP_FBITS) == 0) { m <<= 1; e--; } #define SPDNORMX SPDNORMx(xm, xe) #define SPDNORMY SPDNORMx(ym, ye) @@ -58,7 +58,7 @@ static inline union ieee754sp buildsp(int s, int bx, unsigned m) assert((s) == 0 || (s) == 1); assert((bx) >= SP_EMIN - 1 + SP_EBIAS && (bx) <= SP_EMAX + 1 + SP_EBIAS); - assert(((m) >> SP_MBITS) == 0); + assert(((m) >> SP_FBITS) == 0); r.parts.sign = s; r.parts.bexp = bx; diff --git a/arch/mips/math-emu/sp_add.c b/arch/mips/math-emu/sp_add.c index e67f11af4acf..d107bce38bfd 100644 --- a/arch/mips/math-emu/sp_add.c +++ b/arch/mips/math-emu/sp_add.c @@ -148,7 +148,7 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y) xe = xe; xs = xs; - if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */ + if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */ SPXSRSX1(); } } else { @@ -166,7 +166,7 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y) IEEE754_RD); /* normalize in extended single precision */ - while ((xm >> (SP_MBITS + 3)) == 0) { + while ((xm >> (SP_FBITS + 3)) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/sp_div.c b/arch/mips/math-emu/sp_div.c index 4caac973e2a6..095fb20262a9 100644 --- a/arch/mips/math-emu/sp_div.c +++ b/arch/mips/math-emu/sp_div.c @@ -129,7 +129,7 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y) int re = xe - ye; unsigned bm; - for (bm = SP_MBIT(SP_MBITS + 2); bm; bm >>= 1) { + for (bm = SP_MBIT(SP_FBITS + 2); bm; bm >>= 1) { if (xm >= ym) { xm -= ym; rm |= bm; @@ -146,7 +146,7 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y) /* normalise rm to rounding precision ? */ - while ((rm >> (SP_MBITS + 3)) == 0) { + while ((rm >> (SP_FBITS + 3)) == 0) { rm <<= 1; re--; } diff --git a/arch/mips/math-emu/sp_fdp.c b/arch/mips/math-emu/sp_fdp.c index 569878d7cb98..c22ffcac2651 100644 --- a/arch/mips/math-emu/sp_fdp.c +++ b/arch/mips/math-emu/sp_fdp.c @@ -43,7 +43,7 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x) return ieee754sp_nanxcpt(ieee754sp_indef(), "fdp"); case IEEE754_CLASS_QNAN: nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (u32) - (xm >> (DP_MBITS - SP_MBITS))); + (xm >> (DP_FBITS - SP_FBITS))); if (!ieee754sp_isnan(nan)) nan = ieee754sp_indef(); return ieee754sp_nanxcpt(nan, "fdp", x); @@ -66,10 +66,10 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x) { u32 rm; - /* convert from DP_MBITS to SP_MBITS+3 with sticky right shift + /* convert from DP_FBITS to SP_FBITS+3 with sticky right shift */ - rm = (xm >> (DP_MBITS - (SP_MBITS + 3))) | - ((xm << (64 - (DP_MBITS - (SP_MBITS + 3)))) != 0); + rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) | + ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0); SPNORMRET1(xs, xe, rm, "fdp", x); } diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c index 74619e73796c..9574d25f6122 100644 --- a/arch/mips/math-emu/sp_fint.c +++ b/arch/mips/math-emu/sp_fint.c @@ -50,18 +50,18 @@ union ieee754sp ieee754sp_fint(int x) } else { xm = x; } - xe = SP_MBITS + 3; + xe = SP_FBITS + 3; - if (xm >> (SP_MBITS + 1 + 3)) { + if (xm >> (SP_FBITS + 1 + 3)) { /* shunt out overflow bits */ - while (xm >> (SP_MBITS + 1 + 3)) { + while (xm >> (SP_FBITS + 1 + 3)) { SPXSRSX1(); } } else { /* normalize in grs extended single precision */ - while ((xm >> (SP_MBITS + 3)) == 0) { + while ((xm >> (SP_FBITS + 3)) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/sp_flong.c b/arch/mips/math-emu/sp_flong.c index ea065ae14766..65c7e7e67b60 100644 --- a/arch/mips/math-emu/sp_flong.c +++ b/arch/mips/math-emu/sp_flong.c @@ -50,17 +50,17 @@ union ieee754sp ieee754sp_flong(s64 x) } else { xm = x; } - xe = SP_MBITS + 3; + xe = SP_FBITS + 3; - if (xm >> (SP_MBITS + 1 + 3)) { + if (xm >> (SP_FBITS + 1 + 3)) { /* shunt out overflow bits */ - while (xm >> (SP_MBITS + 1 + 3)) { + while (xm >> (SP_FBITS + 1 + 3)) { SPXSRSX1(); } } else { /* normalize in grs extended single precision */ - while ((xm >> (SP_MBITS + 3)) == 0) { + while ((xm >> (SP_FBITS + 3)) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/sp_modf.c b/arch/mips/math-emu/sp_modf.c index 22f19a22ab02..5f361a7a10b6 100644 --- a/arch/mips/math-emu/sp_modf.c +++ b/arch/mips/math-emu/sp_modf.c @@ -54,24 +54,24 @@ union ieee754sp ieee754sp_modf(union ieee754sp x, union ieee754sp *ip) *ip = ieee754sp_zero(xs); return x; } - if (xe >= SP_MBITS) { + if (xe >= SP_FBITS) { *ip = x; return ieee754sp_zero(xs); } /* generate ipart mantissa by clearing bottom bits */ *ip = buildsp(xs, xe + SP_EBIAS, - ((xm >> (SP_MBITS - xe)) << (SP_MBITS - xe)) & + ((xm >> (SP_FBITS - xe)) << (SP_FBITS - xe)) & ~SP_HIDDEN_BIT); /* generate fpart mantissa by clearing top bits * and normalizing (must be able to normalize) */ - xm = (xm << (32 - (SP_MBITS - xe))) >> (32 - (SP_MBITS - xe)); + xm = (xm << (32 - (SP_FBITS - xe))) >> (32 - (SP_FBITS - xe)); if (xm == 0) return ieee754sp_zero(xs); - while ((xm >> SP_MBITS) == 0) { + while ((xm >> SP_FBITS) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/sp_mul.c b/arch/mips/math-emu/sp_mul.c index 844b3bde0ab6..28f608f25499 100644 --- a/arch/mips/math-emu/sp_mul.c +++ b/arch/mips/math-emu/sp_mul.c @@ -114,8 +114,8 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y) unsigned rm; /* shunt to top of word */ - xm <<= 32 - (SP_MBITS + 1); - ym <<= 32 - (SP_MBITS + 1); + xm <<= 32 - (SP_FBITS + 1); + ym <<= 32 - (SP_FBITS + 1); /* multiply 32bits xm,ym to give high 32bits rm with stickness */ @@ -156,12 +156,12 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y) * sticky shift down to normal rounding precision */ if ((int) rm < 0) { - rm = (rm >> (32 - (SP_MBITS + 1 + 3))) | - ((rm << (SP_MBITS + 1 + 3)) != 0); + rm = (rm >> (32 - (SP_FBITS + 1 + 3))) | + ((rm << (SP_FBITS + 1 + 3)) != 0); re++; } else { - rm = (rm >> (32 - (SP_MBITS + 1 + 3 + 1))) | - ((rm << (SP_MBITS + 1 + 3 + 1)) != 0); + rm = (rm >> (32 - (SP_FBITS + 1 + 3 + 1))) | + ((rm << (SP_FBITS + 1 + 3 + 1)) != 0); } assert(rm & (SP_HIDDEN_BIT << 3)); diff --git a/arch/mips/math-emu/sp_sub.c b/arch/mips/math-emu/sp_sub.c index 7e45ba3c2a38..1131065d0178 100644 --- a/arch/mips/math-emu/sp_sub.c +++ b/arch/mips/math-emu/sp_sub.c @@ -153,7 +153,7 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y) xe = xe; xs = xs; - if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */ + if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */ SPXSRSX1(); /* shift preserving sticky */ } } else { @@ -174,7 +174,7 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y) } /* normalize to rounding precision */ - while ((xm >> (SP_MBITS + 3)) == 0) { + while ((xm >> (SP_FBITS + 3)) == 0) { xm <<= 1; xe--; } diff --git a/arch/mips/math-emu/sp_tint.c b/arch/mips/math-emu/sp_tint.c index febcf5cc4fbc..709f6bcd490b 100644 --- a/arch/mips/math-emu/sp_tint.c +++ b/arch/mips/math-emu/sp_tint.c @@ -57,8 +57,8 @@ int ieee754sp_tint(union ieee754sp x) return ieee754si_xcpt(ieee754si_indef(), "sp_tint", x); } /* oh gawd */ - if (xe > SP_MBITS) { - xm <<= xe - SP_MBITS; + if (xe > SP_FBITS) { + xm <<= xe - SP_FBITS; } else { u32 residue; int round; @@ -75,10 +75,10 @@ int ieee754sp_tint(union ieee754sp x) * so we do it in two steps. Be aware that xe * may be -1 */ residue = xm << (xe + 1); - residue <<= 31 - SP_MBITS; + residue <<= 31 - SP_FBITS; round = (residue >> 31) != 0; sticky = (residue << 1) != 0; - xm >>= SP_MBITS - xe; + xm >>= SP_FBITS - xe; } odd = (xm & 0x1) != 0x0; switch (ieee754_csr.rm) { diff --git a/arch/mips/math-emu/sp_tlong.c b/arch/mips/math-emu/sp_tlong.c index a05d09318fb1..155491f85d7f 100644 --- a/arch/mips/math-emu/sp_tlong.c +++ b/arch/mips/math-emu/sp_tlong.c @@ -57,9 +57,9 @@ s64 ieee754sp_tlong(union ieee754sp x) return ieee754di_xcpt(ieee754di_indef(), "sp_tlong", x); } /* oh gawd */ - if (xe > SP_MBITS) { - xm <<= xe - SP_MBITS; - } else if (xe < SP_MBITS) { + if (xe > SP_FBITS) { + xm <<= xe - SP_FBITS; + } else if (xe < SP_FBITS) { u32 residue; int round; int sticky; @@ -71,10 +71,10 @@ s64 ieee754sp_tlong(union ieee754sp x) sticky = residue != 0; xm = 0; } else { - residue = xm << (32 - SP_MBITS + xe); + residue = xm << (32 - SP_FBITS + xe); round = (residue >> 31) != 0; sticky = (residue << 1) != 0; - xm >>= SP_MBITS - xe; + xm >>= SP_FBITS - xe; } odd = (xm & 0x1) != 0x0; switch (ieee754_csr.rm) { -- 2.39.2