From c6d2ac2c36f80b8be15d47a8da6fca803a432e1c Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 1 Oct 2014 09:36:57 -0400 Subject: [PATCH] drm/radeon: add get_allowed_info_register for r6xx/r7xx MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/r600.c | 26 ++++++++++++++++++++++++++ drivers/gpu/drm/radeon/radeon_asic.c | 4 ++++ drivers/gpu/drm/radeon/radeon_asic.h | 2 ++ 3 files changed, 32 insertions(+) diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 2fcad344492f..8f6d862a1882 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -108,6 +108,32 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev); extern int evergreen_rlc_resume(struct radeon_device *rdev); extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev); +/** + * r600_get_allowed_info_register - fetch the register for the info ioctl + * + * @rdev: radeon_device pointer + * @reg: register offset in bytes + * @val: register value + * + * Returns 0 for success or -EINVAL for an invalid register + * + */ +int r600_get_allowed_info_register(struct radeon_device *rdev, + u32 reg, u32 *val) +{ + switch (reg) { + case GRBM_STATUS: + case GRBM_STATUS2: + case R_000E50_SRBM_STATUS: + case DMA_STATUS_REG: + case UVD_STATUS: + *val = RREG32(reg); + return 0; + default: + return -EINVAL; + } +} + /** * r600_get_xclk - get the xclk * diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 558be7a88b2f..f2c343717c4b 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c @@ -940,6 +940,7 @@ static struct radeon_asic r600_asic = { .mc_wait_for_idle = &r600_mc_wait_for_idle, .get_xclk = &r600_get_xclk, .get_gpu_clock_counter = &r600_get_gpu_clock_counter, + .get_allowed_info_register = r600_get_allowed_info_register, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .get_page_entry = &rs600_gart_get_page_entry, @@ -1024,6 +1025,7 @@ static struct radeon_asic rv6xx_asic = { .mc_wait_for_idle = &r600_mc_wait_for_idle, .get_xclk = &r600_get_xclk, .get_gpu_clock_counter = &r600_get_gpu_clock_counter, + .get_allowed_info_register = r600_get_allowed_info_register, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .get_page_entry = &rs600_gart_get_page_entry, @@ -1116,6 +1118,7 @@ static struct radeon_asic rs780_asic = { .mc_wait_for_idle = &r600_mc_wait_for_idle, .get_xclk = &r600_get_xclk, .get_gpu_clock_counter = &r600_get_gpu_clock_counter, + .get_allowed_info_register = r600_get_allowed_info_register, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .get_page_entry = &rs600_gart_get_page_entry, @@ -1221,6 +1224,7 @@ static struct radeon_asic rv770_asic = { .mc_wait_for_idle = &r600_mc_wait_for_idle, .get_xclk = &rv770_get_xclk, .get_gpu_clock_counter = &r600_get_gpu_clock_counter, + .get_allowed_info_register = r600_get_allowed_info_register, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .get_page_entry = &rs600_gart_get_page_entry, diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 4259daf94d91..3e1346d585b3 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h @@ -384,6 +384,8 @@ u32 r600_gfx_get_wptr(struct radeon_device *rdev, struct radeon_ring *ring); void r600_gfx_set_wptr(struct radeon_device *rdev, struct radeon_ring *ring); +int r600_get_allowed_info_register(struct radeon_device *rdev, + u32 reg, u32 *val); /* r600 irq */ int r600_irq_process(struct radeon_device *rdev); int r600_irq_init(struct radeon_device *rdev); -- 2.39.5