From c9e1aa852925106b568ad434afa07d420ec3a954 Mon Sep 17 00:00:00 2001 From: Jason Chen Date: Tue, 17 May 2011 13:05:32 +0800 Subject: [PATCH] ENGR00142865 ipuv3: add pixel clk to clk dev add pixel clk to clk dev Signed-off-by: Jason Chen --- drivers/mxc/ipu3/ipu_common.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/mxc/ipu3/ipu_common.c b/drivers/mxc/ipu3/ipu_common.c index 7df46ce429da..1fbdc18a7070 100644 --- a/drivers/mxc/ipu3/ipu_common.c +++ b/drivers/mxc/ipu3/ipu_common.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -220,8 +221,14 @@ static int _ipu_pixel_clk_set_parent(struct clk *clk, struct clk *parent) return 0; } +#ifdef CONFIG_CLK_DEBUG +#define __INIT_CLK_DEBUG(n) .name = #n, +#else +#define __INIT_CLK_DEBUG(n) +#endif static struct clk pixel_clk[] = { { + __INIT_CLK_DEBUG(pixel_clk_0) .id = 0, .get_rate = _ipu_pixel_clk_get_rate, .set_rate = _ipu_pixel_clk_set_rate, @@ -231,6 +238,7 @@ static struct clk pixel_clk[] = { .disable = _ipu_pixel_clk_disable, }, { + __INIT_CLK_DEBUG(pixel_clk_1) .id = 1, .get_rate = _ipu_pixel_clk_get_rate, .set_rate = _ipu_pixel_clk_set_rate, @@ -241,6 +249,19 @@ static struct clk pixel_clk[] = { }, }; +#define _REGISTER_CLOCK(d, n, c) \ + { \ + .dev_id = d, \ + .con_id = n, \ + .clk = &c, \ + } + +static struct clk_lookup ipu_lookups[] = { + _REGISTER_CLOCK(NULL, "pixel_clk_0", pixel_clk[0]), + _REGISTER_CLOCK(NULL, "pixel_clk_1", pixel_clk[1]), + +}; + int __initdata primary_di = { 0 }; static int __init di1_setup(char *__unused) { @@ -399,6 +420,11 @@ static int ipu_probe(struct platform_device *pdev) dev_dbg(g_ipu_dev, "IPU DC Template Mem = %p\n", ipu_dc_tmpl_reg); dev_dbg(g_ipu_dev, "IPU Display Region 1 Mem = %p\n", ipu_disp_base[1]); + clkdev_add(&ipu_lookups[0]); + clkdev_add(&ipu_lookups[1]); + clk_debug_register(&pixel_clk[0]); + clk_debug_register(&pixel_clk[1]); + g_pixel_clk[0] = &pixel_clk[0]; g_pixel_clk[1] = &pixel_clk[1]; -- 2.39.2