From ca3d241cb2974852192bdeb896bf5e2c46463286 Mon Sep 17 00:00:00 2001 From: Joseph Lo Date: Fri, 9 Nov 2012 14:40:41 -0700 Subject: [PATCH] ARM: tegra: enable data prefetch on L2 Enable the data prefetch on L2. The bit28 in aux ctrl register. Signed-off-by: Joseph Lo Signed-off-by: Stephen Warren Acked-by: Peter De Schrijver --- arch/arm/mach-tegra/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 6c04a18a88d6..89d3ebc06eb3 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -121,7 +121,7 @@ static void __init tegra_init_cache(void) cache_type = readl(p + L2X0_CACHE_TYPE); aux_ctrl = (cache_type & 0x700) << (17-8); - aux_ctrl |= 0x6C000001; + aux_ctrl |= 0x7C000001; l2x0_of_init(aux_ctrl, 0x8200c3fe); #endif -- 2.39.5