From ccef0da819dd7fa716b90e584a7793a8849b06f1 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Tue, 22 Mar 2016 11:10:38 -0700 Subject: [PATCH] staging: comedi: ni_660x: tidy up the misc. constants Remove enum ni_660x_constants and just #define the value. Move all the constant #defines so they are in one place and rename them so they are more conesistent. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- drivers/staging/comedi/drivers/ni_660x.c | 49 ++++++++++++------------ 1 file changed, 24 insertions(+), 25 deletions(-) diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c index bb5b5ff4e32f..80499d6de44b 100644 --- a/drivers/staging/comedi/drivers/ni_660x.c +++ b/drivers/staging/comedi/drivers/ni_660x.c @@ -41,14 +41,6 @@ #include "mite.h" #include "ni_tio.h" -enum ni_660x_constants { - counters_per_chip = 4 -}; - -#define NUM_PFI_CHANNELS 40 -/* there are only up to 3 dma channels, but the register layout allows for 4 */ -#define MAX_DMA_CHANNEL 4 - /* See Register-Level Programmer Manual page 3.1 */ enum ni_660x_register { NI660X_G0_INT_ACK, @@ -390,22 +382,29 @@ static const struct ni_660x_board ni_660x_boards[] = { }, }; -#define NI_660X_MAX_NUM_CHIPS 2 -#define NI_660X_MAX_NUM_COUNTERS (NI_660X_MAX_NUM_CHIPS * counters_per_chip) +#define NI660X_NUM_PFI_CHANNELS 40 + +/* there are only up to 3 dma channels, but the register layout allows for 4 */ +#define NI660X_MAX_DMA_CHANNEL 4 + +#define NI660X_COUNTERS_PER_CHIP 4 +#define NI660X_MAX_CHIPS 2 +#define NI660X_MAX_COUNTERS (NI660X_MAX_CHIPS * \ + NI660X_COUNTERS_PER_CHIP) struct ni_660x_private { struct mite_struct *mite; struct ni_gpct_device *counter_dev; struct mite_dma_descriptor_ring - *mite_rings[NI_660X_MAX_NUM_CHIPS][counters_per_chip]; + *mite_rings[NI660X_MAX_CHIPS][NI660X_COUNTERS_PER_CHIP]; /* protects mite channel request/release */ spinlock_t mite_channel_lock; /* prevents races between interrupt and comedi_poll */ spinlock_t interrupt_lock; /* protects dma_cfg changes */ spinlock_t dma_cfg_lock; - unsigned int dma_cfg[NI_660X_MAX_NUM_CHIPS]; - unsigned int io_cfg[NUM_PFI_CHANNELS]; + unsigned int dma_cfg[NI660X_MAX_CHIPS]; + unsigned int io_cfg[NI660X_NUM_PFI_CHANNELS]; u64 io_dir; }; @@ -667,7 +666,7 @@ static int ni_660x_allocate_private(struct comedi_device *dev) spin_lock_init(&devpriv->mite_channel_lock); spin_lock_init(&devpriv->interrupt_lock); spin_lock_init(&devpriv->dma_cfg_lock); - for (i = 0; i < NUM_PFI_CHANNELS; ++i) + for (i = 0; i < NI660X_NUM_PFI_CHANNELS; ++i) devpriv->io_cfg[i] = NI_660X_PFI_OUTPUT_COUNTER; return 0; @@ -681,7 +680,7 @@ static int ni_660x_alloc_mite_rings(struct comedi_device *dev) unsigned int j; for (i = 0; i < board->n_chips; ++i) { - for (j = 0; j < counters_per_chip; ++j) { + for (j = 0; j < NI660X_COUNTERS_PER_CHIP; ++j) { devpriv->mite_rings[i][j] = mite_alloc_ring(devpriv->mite); if (!devpriv->mite_rings[i][j]) @@ -699,7 +698,7 @@ static void ni_660x_free_mite_rings(struct comedi_device *dev) unsigned int j; for (i = 0; i < board->n_chips; ++i) { - for (j = 0; j < counters_per_chip; ++j) + for (j = 0; j < NI660X_COUNTERS_PER_CHIP; ++j) mite_free_ring(devpriv->mite_rings[i][j]); } } @@ -711,10 +710,10 @@ static void init_tio_chip(struct comedi_device *dev, int chipset) /* init dma configuration register */ devpriv->dma_cfg[chipset] = 0; - for (i = 0; i < MAX_DMA_CHANNEL; ++i) + for (i = 0; i < NI660X_MAX_DMA_CHANNEL; ++i) devpriv->dma_cfg[chipset] |= NI660X_DMA_CFG_SEL_NONE(i); ni_660x_write(dev, chipset, devpriv->dma_cfg[chipset], NI660X_DMA_CFG); - for (i = 0; i < NUM_PFI_CHANNELS; ++i) + for (i = 0; i < NI660X_NUM_PFI_CHANNELS; ++i) ni_660x_write(dev, chipset, 0, NI660X_IO_CFG(i)); } @@ -899,7 +898,7 @@ static int ni_660x_auto_attach(struct comedi_device *dev, if (ret < 0) return ret; - ret = comedi_alloc_subdevices(dev, 2 + NI_660X_MAX_NUM_COUNTERS); + ret = comedi_alloc_subdevices(dev, 2 + NI660X_MAX_COUNTERS); if (ret) return ret; @@ -965,7 +964,7 @@ static int ni_660x_auto_attach(struct comedi_device *dev, s = &dev->subdevices[subdev++]; s->type = COMEDI_SUBD_DIO; s->subdev_flags = SDF_READABLE | SDF_WRITABLE; - s->n_chan = NUM_PFI_CHANNELS; + s->n_chan = NI660X_NUM_PFI_CHANNELS; s->maxdata = 1; s->range_table = &range_digital; s->insn_bits = ni_660x_dio_insn_bits; @@ -977,7 +976,7 @@ static int ni_660x_auto_attach(struct comedi_device *dev, */ ni_660x_write(dev, 0, 0, NI660X_STC_DIO_CONTROL); - n_counters = board->n_chips * counters_per_chip; + n_counters = board->n_chips * NI660X_COUNTERS_PER_CHIP; devpriv->counter_dev = ni_gpct_device_construct(dev, ni_660x_gpct_write, ni_660x_gpct_read, @@ -985,7 +984,7 @@ static int ni_660x_auto_attach(struct comedi_device *dev, n_counters); if (!devpriv->counter_dev) return -ENOMEM; - for (i = 0; i < NI_660X_MAX_NUM_COUNTERS; ++i) { + for (i = 0; i < NI660X_MAX_COUNTERS; ++i) { s = &dev->subdevices[subdev++]; if (i < n_counters) { s->type = COMEDI_SUBD_COUNTER; @@ -1006,9 +1005,9 @@ static int ni_660x_auto_attach(struct comedi_device *dev, s->private = &devpriv->counter_dev->counters[i]; devpriv->counter_dev->counters[i].chip_index = - i / counters_per_chip; + i / NI660X_COUNTERS_PER_CHIP; devpriv->counter_dev->counters[i].counter_index = - i % counters_per_chip; + i % NI660X_COUNTERS_PER_CHIP; } else { s->type = COMEDI_SUBD_UNUSED; } @@ -1024,7 +1023,7 @@ static int ni_660x_auto_attach(struct comedi_device *dev, * chan 0-7: DIO inputs * chan 8-39: counter signal inputs */ - for (i = 0; i < NUM_PFI_CHANNELS; ++i) { + for (i = 0; i < NI660X_NUM_PFI_CHANNELS; ++i) { if (i < 8) ni_660x_set_pfi_routing(dev, i, NI_660X_PFI_OUTPUT_DIO); else -- 2.39.5