From d6ec53e04bf7906a0fffd8f272d89ab4e04c2cd5 Mon Sep 17 00:00:00 2001 From: Matthijs Kooijman Date: Fri, 30 Aug 2013 18:45:15 +0200 Subject: [PATCH] staging: dwc2: simplify register shift expressions This commit changes expressions from (val >> shift) & (mask >> shift) to (val & mask) >> shift. Signed-off-by: Matthijs Kooijman Acked-by: Paul Zimmerman Signed-off-by: Greg Kroah-Hartman --- drivers/staging/dwc2/core.c | 20 +++++------ drivers/staging/dwc2/hcd.c | 62 +++++++++++++++------------------ drivers/staging/dwc2/hcd_ddma.c | 8 ++--- drivers/staging/dwc2/hcd_intr.c | 22 +++++------- 4 files changed, 50 insertions(+), 62 deletions(-) diff --git a/drivers/staging/dwc2/core.c b/drivers/staging/dwc2/core.c index 9eabebbc16b8..04c251c82bc8 100644 --- a/drivers/staging/dwc2/core.c +++ b/drivers/staging/dwc2/core.c @@ -1386,14 +1386,14 @@ void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg, dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__, chan->hc_num); dev_vdbg(hsotg->dev, " Xfer Size: %d\n", - hctsiz >> TSIZ_XFERSIZE_SHIFT & - TSIZ_XFERSIZE_MASK >> TSIZ_XFERSIZE_SHIFT); + (hctsiz & TSIZ_XFERSIZE_MASK) >> + TSIZ_XFERSIZE_SHIFT); dev_vdbg(hsotg->dev, " Num Pkts: %d\n", - hctsiz >> TSIZ_PKTCNT_SHIFT & - TSIZ_PKTCNT_MASK >> TSIZ_PKTCNT_SHIFT); + (hctsiz & TSIZ_PKTCNT_MASK) >> + TSIZ_PKTCNT_SHIFT); dev_vdbg(hsotg->dev, " Start PID: %d\n", - hctsiz >> TSIZ_SC_MC_PID_SHIFT & - TSIZ_SC_MC_PID_MASK >> TSIZ_SC_MC_PID_SHIFT); + (hctsiz & TSIZ_SC_MC_PID_MASK) >> + TSIZ_SC_MC_PID_SHIFT); } if (hsotg->core_params->dma_enable > 0) { @@ -1437,8 +1437,8 @@ void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg, if (dbg_hc(chan)) dev_vdbg(hsotg->dev, " Multi Cnt: %d\n", - hcchar >> HCCHAR_MULTICNT_SHIFT & - HCCHAR_MULTICNT_MASK >> HCCHAR_MULTICNT_SHIFT); + (hcchar & HCCHAR_MULTICNT_MASK) >> + HCCHAR_MULTICNT_SHIFT); writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num)); if (dbg_hc(chan)) @@ -1526,8 +1526,8 @@ void dwc2_hc_start_transfer_ddma(struct dwc2_hsotg *hsotg, if (dbg_hc(chan)) dev_vdbg(hsotg->dev, " Multi Cnt: %d\n", - hcchar >> HCCHAR_MULTICNT_SHIFT & - HCCHAR_MULTICNT_MASK >> HCCHAR_MULTICNT_SHIFT); + (hcchar & HCCHAR_MULTICNT_MASK) >> + HCCHAR_MULTICNT_SHIFT); writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num)); if (dbg_hc(chan)) diff --git a/drivers/staging/dwc2/hcd.c b/drivers/staging/dwc2/hcd.c index d48830414561..f11b4f098006 100644 --- a/drivers/staging/dwc2/hcd.c +++ b/drivers/staging/dwc2/hcd.c @@ -1005,10 +1005,10 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg) dev_vdbg(hsotg->dev, "Queue periodic transactions\n"); tx_status = readl(hsotg->regs + HPTXSTS); - qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & - TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; - fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & - TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; + qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> + TXSTS_QSPCAVAIL_SHIFT; + fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> + TXSTS_FSPCAVAIL_SHIFT; if (dbg_perio()) { dev_vdbg(hsotg->dev, " P Tx Req Queue Space Avail (before queue): %d\n", @@ -1046,8 +1046,8 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg) qh->channel->multi_count > 1) hsotg->queuing_high_bandwidth = 1; - fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & - TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; + fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> + TXSTS_FSPCAVAIL_SHIFT; status = dwc2_queue_transaction(hsotg, qh->channel, fspcavail); if (status < 0) { no_fifo_space = 1; @@ -1078,10 +1078,10 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg) if (hsotg->core_params->dma_enable <= 0) { tx_status = readl(hsotg->regs + HPTXSTS); - qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & - TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; - fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & - TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; + qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> + TXSTS_QSPCAVAIL_SHIFT; + fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> + TXSTS_FSPCAVAIL_SHIFT; if (dbg_perio()) { dev_vdbg(hsotg->dev, " P Tx Req Queue Space Avail (after queue): %d\n", @@ -1143,10 +1143,10 @@ static void dwc2_process_non_periodic_channels(struct dwc2_hsotg *hsotg) dev_vdbg(hsotg->dev, "Queue non-periodic transactions\n"); tx_status = readl(hsotg->regs + GNPTXSTS); - qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & - TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; - fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & - TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; + qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> + TXSTS_QSPCAVAIL_SHIFT; + fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> + TXSTS_FSPCAVAIL_SHIFT; dev_vdbg(hsotg->dev, " NP Tx Req Queue Space Avail (before queue): %d\n", qspcavail); dev_vdbg(hsotg->dev, " NP Tx FIFO Space Avail (before queue): %d\n", @@ -1166,8 +1166,8 @@ static void dwc2_process_non_periodic_channels(struct dwc2_hsotg *hsotg) */ do { tx_status = readl(hsotg->regs + GNPTXSTS); - qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & - TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; + qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> + TXSTS_QSPCAVAIL_SHIFT; if (hsotg->core_params->dma_enable <= 0 && qspcavail == 0) { no_queue_space = 1; break; @@ -1182,8 +1182,8 @@ static void dwc2_process_non_periodic_channels(struct dwc2_hsotg *hsotg) if (qh->tt_buffer_dirty) goto next; - fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & - TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; + fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> + TXSTS_FSPCAVAIL_SHIFT; status = dwc2_queue_transaction(hsotg, qh->channel, fspcavail); if (status > 0) { @@ -1203,10 +1203,10 @@ next: if (hsotg->core_params->dma_enable <= 0) { tx_status = readl(hsotg->regs + GNPTXSTS); - qspcavail = tx_status >> TXSTS_QSPCAVAIL_SHIFT & - TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT; - fspcavail = tx_status >> TXSTS_FSPCAVAIL_SHIFT & - TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT; + qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> + TXSTS_QSPCAVAIL_SHIFT; + fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> + TXSTS_FSPCAVAIL_SHIFT; dev_vdbg(hsotg->dev, " NP Tx Req Queue Space Avail (after queue): %d\n", qspcavail); @@ -1761,11 +1761,9 @@ int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg) #ifdef DWC2_DEBUG_SOF dev_vdbg(hsotg->dev, "DWC OTG HCD GET FRAME NUMBER %d\n", - hfnum >> HFNUM_FRNUM_SHIFT & - HFNUM_FRNUM_MASK >> HFNUM_FRNUM_SHIFT); + (hfnum & HFNUM_FRNUM_MASK) >> HFNUM_FRNUM_SHIFT); #endif - return hfnum >> HFNUM_FRNUM_SHIFT & - HFNUM_FRNUM_MASK >> HFNUM_FRNUM_SHIFT; + return (hfnum & HFNUM_FRNUM_MASK) >> HFNUM_FRNUM_SHIFT; } int dwc2_hcd_is_b_host(struct dwc2_hsotg *hsotg) @@ -1916,18 +1914,14 @@ void dwc2_hcd_dump_state(struct dwc2_hsotg *hsotg) dev_dbg(hsotg->dev, " periodic_usecs: %d\n", hsotg->periodic_usecs); np_tx_status = readl(hsotg->regs + GNPTXSTS); dev_dbg(hsotg->dev, " NP Tx Req Queue Space Avail: %d\n", - np_tx_status >> TXSTS_QSPCAVAIL_SHIFT & - TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT); + (np_tx_status & TXSTS_QSPCAVAIL_MASK) >> TXSTS_QSPCAVAIL_SHIFT); dev_dbg(hsotg->dev, " NP Tx FIFO Space Avail: %d\n", - np_tx_status >> TXSTS_FSPCAVAIL_SHIFT & - TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT); + (np_tx_status & TXSTS_FSPCAVAIL_MASK) >> TXSTS_FSPCAVAIL_SHIFT); p_tx_status = readl(hsotg->regs + HPTXSTS); dev_dbg(hsotg->dev, " P Tx Req Queue Space Avail: %d\n", - p_tx_status >> TXSTS_QSPCAVAIL_SHIFT & - TXSTS_QSPCAVAIL_MASK >> TXSTS_QSPCAVAIL_SHIFT); + (p_tx_status & TXSTS_QSPCAVAIL_MASK) >> TXSTS_QSPCAVAIL_SHIFT); dev_dbg(hsotg->dev, " P Tx FIFO Space Avail: %d\n", - p_tx_status >> TXSTS_FSPCAVAIL_SHIFT & - TXSTS_FSPCAVAIL_MASK >> TXSTS_FSPCAVAIL_SHIFT); + (p_tx_status & TXSTS_FSPCAVAIL_MASK) >> TXSTS_FSPCAVAIL_SHIFT); dwc2_hcd_dump_frrem(hsotg); dwc2_dump_global_registers(hsotg); dwc2_dump_host_registers(hsotg); diff --git a/drivers/staging/dwc2/hcd_ddma.c b/drivers/staging/dwc2/hcd_ddma.c index de5af1b9b5d9..69070f4442a8 100644 --- a/drivers/staging/dwc2/hcd_ddma.c +++ b/drivers/staging/dwc2/hcd_ddma.c @@ -806,8 +806,8 @@ static int dwc2_cmpl_host_isoc_dma_desc(struct dwc2_hsotg *hsotg, frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index_last]; dma_desc->buf = (u32)(qtd->urb->dma + frame_desc->offset); if (chan->ep_is_in) - remain = dma_desc->status >> HOST_DMA_ISOC_NBYTES_SHIFT & - HOST_DMA_ISOC_NBYTES_MASK >> HOST_DMA_ISOC_NBYTES_SHIFT; + remain = (dma_desc->status & HOST_DMA_ISOC_NBYTES_MASK) >> + HOST_DMA_ISOC_NBYTES_SHIFT; if ((dma_desc->status & HOST_DMA_STS_MASK) == HOST_DMA_STS_PKTERR) { /* @@ -935,8 +935,8 @@ static int dwc2_update_non_isoc_urb_state_ddma(struct dwc2_hsotg *hsotg, u16 remain = 0; if (chan->ep_is_in) - remain = dma_desc->status >> HOST_DMA_NBYTES_SHIFT & - HOST_DMA_NBYTES_MASK >> HOST_DMA_NBYTES_SHIFT; + remain = (dma_desc->status & HOST_DMA_NBYTES_MASK) >> + HOST_DMA_NBYTES_SHIFT; dev_vdbg(hsotg->dev, "remain=%d dwc2_urb=%p\n", remain, urb); diff --git a/drivers/staging/dwc2/hcd_intr.c b/drivers/staging/dwc2/hcd_intr.c index f53f98e5ec52..f60b836b3d13 100644 --- a/drivers/staging/dwc2/hcd_intr.c +++ b/drivers/staging/dwc2/hcd_intr.c @@ -165,18 +165,15 @@ static void dwc2_rx_fifo_level_intr(struct dwc2_hsotg *hsotg) dev_vdbg(hsotg->dev, "--RxFIFO Level Interrupt--\n"); grxsts = readl(hsotg->regs + GRXSTSP); - chnum = grxsts >> GRXSTS_HCHNUM_SHIFT & - GRXSTS_HCHNUM_MASK >> GRXSTS_HCHNUM_SHIFT; + chnum = (grxsts & GRXSTS_HCHNUM_MASK) >> GRXSTS_HCHNUM_SHIFT; chan = hsotg->hc_ptr_array[chnum]; if (!chan) { dev_err(hsotg->dev, "Unable to get corresponding channel\n"); return; } - bcnt = grxsts >> GRXSTS_BYTECNT_SHIFT & - GRXSTS_BYTECNT_MASK >> GRXSTS_BYTECNT_SHIFT; - dpid = grxsts >> GRXSTS_DPID_SHIFT & - GRXSTS_DPID_MASK >> GRXSTS_DPID_SHIFT; + bcnt = (grxsts & GRXSTS_BYTECNT_MASK) >> GRXSTS_BYTECNT_SHIFT; + dpid = (grxsts & GRXSTS_DPID_MASK) >> GRXSTS_DPID_SHIFT; pktsts = (grxsts & GRXSTS_PKTSTS_MASK) >> GRXSTS_PKTSTS_SHIFT; /* Packet Status */ @@ -412,8 +409,8 @@ static u32 dwc2_get_actual_xfer_length(struct dwc2_hsotg *hsotg, if (halt_status == DWC2_HC_XFER_COMPLETE) { if (chan->ep_is_in) { - count = hctsiz >> TSIZ_XFERSIZE_SHIFT & - TSIZ_XFERSIZE_MASK >> TSIZ_XFERSIZE_SHIFT; + count = (hctsiz & TSIZ_XFERSIZE_MASK) >> + TSIZ_XFERSIZE_SHIFT; length = chan->xfer_len - count; if (short_read != NULL) *short_read = (count != 0); @@ -432,8 +429,7 @@ static u32 dwc2_get_actual_xfer_length(struct dwc2_hsotg *hsotg, * hctsiz.xfersize field because that reflects the number of * bytes transferred via the AHB, not the USB). */ - count = hctsiz >> TSIZ_PKTCNT_SHIFT & - TSIZ_PKTCNT_MASK >> TSIZ_PKTCNT_SHIFT; + count = (hctsiz & TSIZ_PKTCNT_MASK) >> TSIZ_PKTCNT_SHIFT; length = (chan->start_pkt_count - count) * chan->max_packet; } @@ -496,8 +492,7 @@ static int dwc2_update_urb_state(struct dwc2_hsotg *hsotg, __func__, (chan->ep_is_in ? "IN" : "OUT"), chnum); dev_vdbg(hsotg->dev, " chan->xfer_len %d\n", chan->xfer_len); dev_vdbg(hsotg->dev, " hctsiz.xfersize %d\n", - hctsiz >> TSIZ_XFERSIZE_SHIFT & - TSIZ_XFERSIZE_MASK >> TSIZ_XFERSIZE_SHIFT); + (hctsiz & TSIZ_XFERSIZE_MASK) >> TSIZ_XFERSIZE_SHIFT); dev_vdbg(hsotg->dev, " urb->transfer_buffer_length %d\n", urb->length); dev_vdbg(hsotg->dev, " urb->actual_length %d\n", urb->actual_length); dev_vdbg(hsotg->dev, " short_read %d, xfer_done %d\n", short_read, @@ -1182,8 +1177,7 @@ static void dwc2_update_urb_state_abn(struct dwc2_hsotg *hsotg, dev_vdbg(hsotg->dev, " chan->start_pkt_count %d\n", chan->start_pkt_count); dev_vdbg(hsotg->dev, " hctsiz.pktcnt %d\n", - hctsiz >> TSIZ_PKTCNT_SHIFT & - TSIZ_PKTCNT_MASK >> TSIZ_PKTCNT_SHIFT); + (hctsiz & TSIZ_PKTCNT_MASK) >> TSIZ_PKTCNT_SHIFT); dev_vdbg(hsotg->dev, " chan->max_packet %d\n", chan->max_packet); dev_vdbg(hsotg->dev, " bytes_transferred %d\n", xfer_length); -- 2.39.5