From db7e391721a21aca4d5c676550a8578319f1f359 Mon Sep 17 00:00:00 2001 From: Terry Lv Date: Wed, 2 Nov 2011 17:26:06 +0800 Subject: [PATCH] ENGR00161234-2: Enable ocotp clock for mx6q Add clock enable code to arch. OCOTP driver missed code to enable clock in driver. Thus if ocotp clock is not enabled in clock.c, ocotp will not work. We will remove ocotp clock enable code in board file and leave this operation to driver. Signed-off-by: Terry Lv --- arch/arm/mach-mx5/clock_mx50.c | 10 +++++++--- arch/arm/mach-mx6/clock.c | 6 ++++++ arch/arm/plat-mxc/devices/platform-imx-ocotp.c | 4 ++-- 3 files changed, 15 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-mx5/clock_mx50.c b/arch/arm/mach-mx5/clock_mx50.c index 60d651687ef4..4d2c2b9b5e81 100755 --- a/arch/arm/mach-mx5/clock_mx50.c +++ b/arch/arm/mach-mx5/clock_mx50.c @@ -2664,6 +2664,11 @@ static struct clk gpmi_nfc_clk[] = { }, }; +static unsigned long _clk_ocotp_get_rate(struct clk *clk) +{ + return clk_get_rate(clk->parent); +} + static struct clk ocotp_clk = { __INIT_CLK_DEBUG(ocotp_clk) .parent = &ahb_clk, @@ -2671,6 +2676,7 @@ static struct clk ocotp_clk = { .enable_reg = MXC_CCM_CCGR7, .enable_shift = MXC_CCM_CCGRx_CG13_OFFSET, .disable = _clk_disable, + .get_rate = _clk_ocotp_get_rate, }; static int _clk_gpu2d_set_parent(struct clk *clk, struct clk *parent) @@ -3341,7 +3347,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "bch-apb", gpmi_nfc_clk[3]), _REGISTER_CLOCK(NULL, "rng_clk", rng_clk), _REGISTER_CLOCK(NULL, "dcp_clk", dcp_clk), - _REGISTER_CLOCK(NULL, "ocotp_ctrl_apb", ocotp_clk), + _REGISTER_CLOCK(NULL, "ocotp_ctrl_ahb_clk", ocotp_clk), _REGISTER_CLOCK(NULL, "ocram_clk", ocram_clk), _REGISTER_CLOCK("mxs-dma-apbh", NULL, apbh_dma_clk), _REGISTER_CLOCK(NULL, "sys_clk", sys_clk), @@ -3475,8 +3481,6 @@ int __init mx50_clocks_init(unsigned long ckil, unsigned long osc, unsigned long clk_enable(&main_bus_clk); - clk_enable(&ocotp_clk); - databahn = ioremap(MX50_DATABAHN_BASE_ADDR, SZ_16K); /* Initialise the parents to be axi_b, parents are set to diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index a632e4158f12..58e6f3cd64f2 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -1617,6 +1617,11 @@ static struct clk gpt_clk[] = { }, }; +static unsigned long _clk_iim_get_rate(struct clk *clk) +{ + return clk_get_rate(clk->parent); +} + static struct clk iim_clk = { __INIT_CLK_DEBUG(iim_clk) .parent = &ipg_clk, @@ -1624,6 +1629,7 @@ static struct clk iim_clk = { .enable_reg = MXC_CCM_CCGR2, .enable_shift = MXC_CCM_CCGRx_CG6_OFFSET, .disable = _clk_disable, + .get_rate = _clk_iim_get_rate, }; static struct clk i2c_clk[] = { diff --git a/arch/arm/plat-mxc/devices/platform-imx-ocotp.c b/arch/arm/plat-mxc/devices/platform-imx-ocotp.c index 792f3cfdb40e..2279aa7b8f91 100755 --- a/arch/arm/plat-mxc/devices/platform-imx-ocotp.c +++ b/arch/arm/plat-mxc/devices/platform-imx-ocotp.c @@ -28,7 +28,7 @@ static const char *bank_reg_desc[BANKS][BANK_ITEMS] = { static const struct mxc_otp_platform_data imx50_otp_platform_data = { .fuse_name = (char **)bank_reg_desc, - .clock_name = "ahb_clk", + .clock_name = "ocotp_ctrl_ahb_clk", .fuse_num = BANKS * BANK_ITEMS, }; @@ -71,7 +71,7 @@ static const char *bank_reg_desc[BANKS][BANK_ITEMS] = { static const struct mxc_otp_platform_data imx6q_otp_platform_data = { .fuse_name = (char **)bank_reg_desc, - .clock_name = "ipg_clk", + .clock_name = "iim_clk", .fuse_num = BANKS * BANK_ITEMS, }; -- 2.39.5