From e0d34ce7d0ca54aa45bc436823863a063f70c31a Mon Sep 17 00:00:00 2001 From: Rafael Barbalho Date: Wed, 9 Apr 2014 13:28:40 +0300 Subject: [PATCH] drm/i915/chv: Implement WaDisableSamplerPowerBypass for CHV MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Cherryview also needs this WA. Signed-off-by: Rafael Barbalho [vsyrjala: Looks like it's for pre-prodution hw only] Signed-off-by: Ville Syrjälä Reviewed-by: Paulo Zanoni Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_pm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 605d8e91e67e..1fff413381e9 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5401,6 +5401,10 @@ static void cherryview_init_clock_gating(struct drm_device *dev) /* WaDisableSDEUnitClockGating:chv */ I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); + + /* WaDisableSamplerPowerBypass:chv (pre-production hw) */ + I915_WRITE(HALF_SLICE_CHICKEN3, + _MASKED_BIT_ENABLE(GEN8_SAMPLER_POWER_BYPASS_DIS)); } static void g4x_init_clock_gating(struct drm_device *dev) -- 2.39.2