From e3b25861027757821521f0488da8386adb5aca3d Mon Sep 17 00:00:00 2001
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Tue, 24 Nov 2015 16:56:56 +0000
Subject: [PATCH] WIP:dts: arm64: add q6v5 pil support

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Conflicts:
	arch/arm64/boot/dts/qcom/msm8916.dtsi
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 90 +++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 7115ed1a2ff3..bc196fc6e55a 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -66,10 +66,16 @@
                         reg = <0x0 0x86400000 0x0 0x0400000>;
                 };
 
+		modem_adsp_mem: modem_adsp_region@86800000 {
+                        no-map;
+			reg = <0x0 0x86800000 0x0 0x04800000>;
+		};
+
                 peripheral_mem: peripheral_region@8b600000 {
                         no-map;
                         reg = <0x0 0x8b600000 0x0 0x0600000>;
                 };
+
 	};
 
 	cpus {
@@ -760,6 +766,32 @@
 			#thermal-sensor-cells = <1>;
 		};
 
+		q6-smp2p {
+			compatible = "qcom,smp2p";
+			qcom,smem = <435>, <428>;
+			interrupts = <0 27 1>;
+			qcom,ipc = <&apcs 8 14>;
+
+			qcom,local-pid = <0>;
+			qcom,remote-pid = <1>;
+
+			q6_smp2p_out: master-kernel {
+				qcom,entry-name = "master-kernel";
+				qcom,outbound;
+
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+			q6_smp2p_in: slave-kernel {
+				qcom,entry-name = "slave-kernel";
+				qcom,inbound;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+			};
+		};
+
 		wcnss-smp2p {
 			compatible = "qcom,smp2p";
 			qcom,smem = <451>, <431>;
@@ -788,6 +820,53 @@
 			};
 		};
 
+		qcom,mss@4080000 {
+			compatible = "qcom,pil-q6v56-mss", "qcom,q6v5-pil";
+			reg = <0x04080000 0x100>,
+			      <0x04020000 0x040>,
+			      <0x01810000 0x004>,
+			      <0x01810000 0x004>,
+			      <0x0194f000 0x010>,
+			      <0x01950000 0x008>,
+			      <0x01951000 0x008>;
+	
+			reg-names = "qdsp6_base", "rmb_base", "restart_reg_sec",
+					"halt_q6", "halt_modem", "halt_nc";
+	
+			interrupts-extended = <&intc 0 24 1>,
+					      <&q6_smp2p_in 0 0>,
+					      <&q6_smp2p_in 1 0>,
+					      <&q6_smp2p_in 2 0>,
+					      <&q6_smp2p_in 3 0>;
+			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+	
+			clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, <&gcc GCC_BOOT_ROM_AHB_CLK>;
+			
+			clock-names = "iface", "bus", "mem";
+
+			qcom,mx-supply = <&pm8916_l3>;
+			qcom,mx-uV = <1050000>;
+			qcom,pll-supply = <&pm8916_l7>;
+			qcom,pll-uV = <1800000>;
+			qcom,proxy-clock-names = "xo";
+			qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk";
+			qcom,is-loadable;
+			qcom,firmware-name = "modem";
+			qcom,pil-self-auth;
+			
+	
+			/* GPIO inputs from mss */
+			qcom,gpio-err-fatal = <&q6_smp2p_in 0 0>;
+			qcom,gpio-err-ready = <&q6_smp2p_in 1 0>;
+			qcom,gpio-proxy-unvote = <&q6_smp2p_in 2 0>;
+			qcom,gpio-stop-ack = <&q6_smp2p_in 3 0>;
+			qcom,gpio-ramdump-disable = <&q6_smp2p_in 15 0>;
+			/* GPIO output to mss */
+			qcom,gpio-force-stop = <&q6_smp2p_out 0 0>;
+			qcom,stop-gpio = <&q6_smp2p_out 0 0>;
+			memory-region = <&modem_adsp_mem>;
+		};
+
 		pronto_rproc:pronto_rproc {
 			compatible = "qcom,tz-pil";
 
@@ -925,6 +1004,17 @@
 			};
 		};
 
+		qcom,smd-modem {
+			interrupts = <0 25 1>;
+			qcom,smd-edge = <0>;
+			qcom,ipc = <&apcs 8 12>;
+			qcom,remote-pid = <1>;
+			ipcrtr_requests {
+				compatible = "qcom,ipcrtr";
+				qcom,smd-channels = "IPCRTR";
+			};
+		};
+
 		pronto_smd_edge: pronto {
 			interrupts = <0 142 1>;
 
-- 
2.39.5