From e71af381c27f72d08b58b142ea1a52751b7b236e Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 3 Aug 2012 19:28:33 +0800 Subject: [PATCH] ENGR00219024 [EPDC]Fix EPDC resume failure. Need to enable both axi and pix clock before doing EPDC reset, or the hardware reset will fail, which will result in dead loop of EPDC resume function, and block system resume. Signed-off-by: Anson Huang --- drivers/video/mxc/mxc_epdc_fb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/mxc/mxc_epdc_fb.c b/drivers/video/mxc/mxc_epdc_fb.c index f78200887054..0b3923c2cea6 100644 --- a/drivers/video/mxc/mxc_epdc_fb.c +++ b/drivers/video/mxc/mxc_epdc_fb.c @@ -857,6 +857,7 @@ static void epdc_init_settings(struct mxc_epdc_fb_data *fb_data) /* Enable clocks to access EPDC regs */ clk_enable(fb_data->epdc_clk_axi); + clk_enable(fb_data->epdc_clk_pix); /* Reset */ __raw_writel(EPDC_CTRL_SFTRST, EPDC_CTRL_SET); @@ -1027,6 +1028,7 @@ static void epdc_init_settings(struct mxc_epdc_fb_data *fb_data) /* Disable clock */ clk_disable(fb_data->epdc_clk_axi); + clk_disable(fb_data->epdc_clk_pix); } static void epdc_powerup(struct mxc_epdc_fb_data *fb_data) -- 2.39.5