From ea2d8a427fa99b70457518c8d3516f46e572b95d Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 12 Mar 2015 17:10:28 +0200 Subject: [PATCH] drm/i915: Store the converted link rates in intel_dp->supported_rates[] MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit No point in converting from hardware format every single time, just store the rates in the final format under intel_dp. Signed-off-by: Ville Syrjälä Reviewed-by: Sonika Jindal Reviewed-by: Todd Previte Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_dp.c | 33 ++++++++++++++++++-------------- drivers/gpu/drm/i915/intel_drv.h | 3 ++- 2 files changed, 21 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index a9b984734b1a..f71ede776f2b 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1144,8 +1144,6 @@ static int intel_read_sink_rates(struct intel_dp *intel_dp, int *sink_rates) { struct drm_device *dev = intel_dp_to_dev(intel_dp); - int i = 0; - uint16_t val; if (INTEL_INFO(dev)->gen >= 9 && intel_dp->supported_rates[0]) { /* @@ -1153,18 +1151,12 @@ intel_read_sink_rates(struct intel_dp *intel_dp, int *sink_rates) * link rate table method, so read link rates from * supported_link_rates */ - for (i = 0; i < DP_MAX_SUPPORTED_RATES; ++i) { - val = le16_to_cpu(intel_dp->supported_rates[i]); - if (val == 0) - break; - - sink_rates[i] = val * 200; - } + memcpy(sink_rates, intel_dp->supported_rates, + sizeof(intel_dp->supported_rates)); - if (i <= 0) - DRM_ERROR("No rates in SUPPORTED_LINK_RATES"); + return intel_dp->num_supported_rates; } - return i; + return 0; } static int @@ -3754,10 +3746,23 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) (intel_dp->dpcd[DP_EDP_CONFIGURATION_CAP] & DP_DPCD_DISPLAY_CONTROL_CAPABLE) && (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_EDP_DPCD_REV, &rev, 1) == 1) && (rev >= 0x03)) { /* eDp v1.4 or higher */ + __le16 supported_rates[DP_MAX_SUPPORTED_RATES]; + int i; + intel_dp_dpcd_read_wake(&intel_dp->aux, DP_SUPPORTED_LINK_RATES, - intel_dp->supported_rates, - sizeof(intel_dp->supported_rates)); + supported_rates, + sizeof(supported_rates)); + + for (i = 0; i < ARRAY_SIZE(supported_rates); i++) { + int val = le16_to_cpu(supported_rates[i]); + + if (val == 0) + break; + + intel_dp->supported_rates[i] = val * 200; + } + intel_dp->num_supported_rates = i; } if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT)) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index c77128c67cf8..69c8437be611 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -627,7 +627,8 @@ struct intel_dp { uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE]; uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; - __le16 supported_rates[DP_MAX_SUPPORTED_RATES]; + uint8_t num_supported_rates; + int supported_rates[DP_MAX_SUPPORTED_RATES]; struct drm_dp_aux aux; uint8_t train_set[4]; int panel_power_up_delay; -- 2.39.2