From eb0b59d49bf46670414acd7b9b32c0db7c856f3e Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 31 May 2017 12:23:12 +0300 Subject: [PATCH] ARM: dts: at91: sama5d2_xplained: add pwm controller Add pwm controller bindings for sama5d2_xplained and enable it. Signed-off-by: Claudiu Beznea Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 4 ++++ arch/arm/boot/dts/sama5d2.dtsi | 8 ++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 37de94fc9b5a..dbce6f7a73dd 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -227,6 +227,10 @@ }; }; + pwm0: pwm@f802c000 { + status = "okay"; + }; + flx0: flexcom@f8034000 { atmel,flexcom-mode = ; status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */ diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index e77fa36cb6f1..cc06da394366 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -1142,6 +1142,14 @@ status = "disabled"; }; + pwm0: pwm@f802c000 { + compatible = "atmel,sama5d2-pwm"; + reg = <0xf802c000 0x4000>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH 7>; + #pwm-cells = <3>; + clocks = <&pwm_clk>; + }; + sfr: sfr@f8030000 { compatible = "atmel,sama5d2-sfr", "syscon"; reg = <0xf8030000 0x98>; -- 2.39.5