From ed4267fe713e890714cbac48444d725ae4b748a8 Mon Sep 17 00:00:00 2001 From: Mahesh Mahadevan Date: Fri, 21 Oct 2011 05:25:06 -0500 Subject: [PATCH] ENGR00160602 Fix MX6 IOMUX Pad configuration code Increase the number of bits for Pad configuration by one [Jason]: Merged conflict, removing the dumplicated def for NO_PAD_CTRL Signed-off-by: Mahesh Mahadevan --- arch/arm/plat-mxc/include/mach/iomux-v3.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index ffde61316631..8d60baed78b4 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h @@ -48,8 +48,8 @@ * PAD_CTRL_OFS: 12..23 (12) * SEL_INPUT_OFS: 24..35 (12) * MUX_MODE + SION: 36..40 (5) - * PAD_CTRL + NO_PAD_CTRL: 41..57 (17) - * SEL_INP: 58..61 (4) + * PAD_CTRL + NO_PAD_CTRL: 41..58 (18) + * SEL_INP: 59..62 (4) * reserved: 63 (1) */ @@ -65,8 +65,8 @@ typedef u64 iomux_v3_cfg_t; #define MUX_MODE_SHIFT 36 #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) #define MUX_PAD_CTRL_SHIFT 41 -#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT) -#define MUX_SEL_INPUT_SHIFT 58 +#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x3ffff << MUX_PAD_CTRL_SHIFT) +#define MUX_SEL_INPUT_SHIFT 59 #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) #define MUX_PAD_CTRL(x) ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT) @@ -83,6 +83,7 @@ typedef u64 iomux_v3_cfg_t; /* * Use to set PAD control */ +#define NO_PAD_CTRL (1 << 17) #ifdef CONFIG_SOC_IMX6Q #define PAD_CTL_HYS (1 << 16) @@ -108,7 +109,6 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_DSE_40ohm (6 << 3) #define PAD_CTL_DSE_34ohm (7 << 3) -#define NO_PAD_CTRL (1 << 16) #define PAD_CTL_SRE_FAST (1 << 0) #define PAD_CTL_SRE_SLOW (0 << 0) -- 2.39.5