From ef296dc947f6a9300a7fb5b696d1e1f543479e18 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Sun, 17 Apr 2016 22:53:04 +0200 Subject: [PATCH] mtd: nand: fsmc: validate ECC setup by checking algorithm directly MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit NAND core sets ECC algorithm in algo field now and it should be preferred over the mode field. This also prepares driver for dropping NAND_ECC_SOFT_BCH. Signed-off-by: Rafał Miłecki Signed-off-by: Boris Brezillon --- drivers/mtd/nand/fsmc_nand.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index 13720405ec81..0f8c63f85f86 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c @@ -958,9 +958,12 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) nand->ecc.strength = 1; break; + case NAND_ECC_SOFT: case NAND_ECC_SOFT_BCH: - dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n"); - break; + if (nand->ecc.algo == NAND_ECC_BCH) { + dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n"); + break; + } default: dev_err(&pdev->dev, "Unsupported ECC mode!\n"); -- 2.39.5